Nxp B.v.

Surendra Guntur

Rinze Ida Mechtildis Peter Meijer

Jan Hoogerbrugge

Hamed Fatemi

Ghiath Al-kadi

Jose De Jesus Pineda De Gyvez

Ghiath Al-Kadi

Sebastien Antonius Josephus Fabrie

Manvi Agarwal

Juan Echeverri Escobar

In an embodiment, a method for processing instructions in a microcontroller is disclosed. In the embodiment, the method involves, upon receipt of an interrupt while an instruction is being executed, completing execution of the instruction by a shadow functional unit and, upon servicing the interrupt, terminating re-execution of the instruction and updating a main register file with the result of the execution of the instruction by the shadow functional unit.

Method and system for processing interrupts with shadow units in a microcontroller

An integrated circuit comprises: a first processing stage comprising processing logic for performing a processing operation on an input signal to generate an output signal, wherein the input signal corresponds to an output signal of a previous processing stage; a first sampling element adapted to sample a first value of said output signal synchronously with a clock signal; a second sampling element adapted to sample a second value of said output signal synchronously with a first delayed clock signal; and a first delayed clock signal generator, adapted to selectively generate said first delayed clock signal in response to a control signal generated in said previous processing stage.

Integrated circuit control based on a first sample value and a delayed second sample value

This invention provides a clock control circuit, which can be added to any pipeline-processor to solve timing problems arising from variations due to process outcome and environmental conditions. Critical instructions are detected (instructions that exercise critical paths) in conjunction with environmental sensing (such as process, temperature and voltage). This information is used to control cycle stealing.

Cycle stealing when a process or environmental variation is detected and a processing instruction is using a critical path

The invention provides a clock select circuit and method which uses feedback arrangements between latches in different branches, with each branch for coupling an associated clock signal to the circuit output. An override circuit is provided in one of the feedback arrangements for preventing a latching delay in that feedback arrangement. This enables rapid switching between clocks in both directions.

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Eindhoven, Netherlands

Surendra Guntur