Samsung Electronics Co., Ltd.

Sunyeong Lee

Woojae Jang

Kyungmoon Kim

Chanjong Ju

Jin-Woo Park

Kyoung-Hoon Kim

Seok-Won Lee

Seungwoo Paek

Taekeun Cho

A nonvolatile memory device includes a memory cell array, an erase body voltage generator, and an erase source voltage generator. The memory cell array includes memory blocks, each of which includes cell strings each including a ground selection transistor, memory cells, and a string selection transistor stacked in a direction perpendicular to a substrate. The erase body voltage generator applies an erase body voltage to the substrate during an erase operation. The erase source voltage generator applies an erase source voltage to a common source line connected with ground selection transistors of the cell strings during the erase operation.

Nonvolatile memory device and memory system including nonvolatile memory device that controls the erase speeds of cell strings

Three-dimensional (3D) semiconductor devices are provided. The 3D semiconductor device includes a plurality of dummy pillars penetrating each cell pad of an electrode structure and the electrode structure disposed under each cell pad. Insulating patterns of a mold stack structure for formation of the electrode structure may be supported by the plurality of dummy pillars, so transformation and contact of the insulating patterns may be minimized or prevented.

Three-dimensional semiconductor devices

Growing community of inventors

Hwaseong-si, South Korea

Sunyeong Lee