Samsung Electronics Co., Ltd.

Sunmin Moon

Young-Lim Park

Younsoo Kim

Kyuho Cho

Hanjin Lim

Haeryong Kim

Jeonggyu Song

Kyooho Jung

Suhwan Kim

Younjoung Cho

Jong-Bom Seo

Sangyeol Kang

Seungmin Ryu

Chang-su Woo

Joohyun Jeon

Changsu Woo

Jungmin Park

Jaehyoung Choi

HyungSuk Jung

Jaewan Chang

A batch-type apparatus for atomic layer etching (ALE), which is capable of ALE-processing several wafers at the same time, and an ALE method and a semiconductor device manufacturing method based on the batch-type apparatus, are provided. The batch-type apparatus for ALE includes a wafer stacking container in which a plurality of wafers are arranged in a vertical direction, an inner tube extending in the vertical direction, a plurality of nozzles arranged in a first outer portion in the inner tube in a horizontal direction, and a heater surrounding the inner tube and configured to adjust a temperature in the inner tube, wherein gas injection holes are formed corresponding to a height of the plurality of wafers in each of the plurality of nozzles, and a gas outlet is formed in a second outer portion in the inner tube, opposite to the first outer portion.

Batch-type apparatus for atomic layer etching (ALE), and ALE method and semiconductor device manufacturing method based on the same apparatus

A semiconductor device includes conductive pillars on a semiconductor substrate, a first support pattern that contacts first portions of lateral surfaces of the conductive pillars and connects the conductive pillars to each other, the first support pattern including first support holes that expose second portions of the lateral surfaces of the conductive pillars, a capping conductive pattern that contacts the second portions of the lateral surfaces of the conductive pillars and exposes the first support pattern, the second portions of the lateral surfaces of the conductive pillars being in no contact with the first support pattern, and a dielectric layer that covers the first support pattern and the capping conductive pattern, the dielectric layer being spaced apart from the conductive pillars.

Semiconductor device with capping conductive layer on an electrode and method of fabricating the same

Disclosed is a semiconductor device including a bottom electrode, a dielectric layer, and a top electrode that are sequentially disposed on a substrate. The dielectric layer includes a hafnium oxide layer including hafnium oxide having a tetragonal crystal structure, and an oxidation seed layer including an oxidation seed material. The oxidation seed material has a lattice constant having a lattice mismatch of 6% or less with one of a horizontal lattice constant and a vertical lattice constant of the hafnium oxide having the tetragonal crystal structure.

Semiconductor device including capacitor

A method of forming an oxide film including two non-oxygen elements includes providing a first source material on a substrate, the first source material including a first central element, providing an electron donor compound to be bonded to the first source material, providing a second source material on the substrate after the providing of the electron donor compound, the second source material including a second central element, and providing an oxidant on the substrate.

Method of forming oxide film including two non-oxygen elements, method of manufacturing semiconductor device, method of forming dielectric film, and semiconductor device

Semiconductor device

A capacitor includes a first electrode and a second electrode spaced apart from each other, a dielectric layer disposed between the first electrode and the second electrode, and a seed layer disposed between the first electrode and the dielectric layer. The dielectric layer includes a dielectric material having a tetragonal crystal structure. The seed layer includes a seed material that satisfies at least one of a lattice constant condition or a bond length condition.

Capacitor, semiconductor device and methods of manufacturing the capacitor and the semiconductor device

A semiconductor device comprises a capacitor that includes a first electrode, a second electrode, and a dielectric layer between the first electrode and the second electrode. The dielectric layer comprises a first high-k dielectric layer between the first electrode and the second electrode, a first silicon oxide layer between the first high-k dielectric layer and the second electrode, and a first aluminum oxide layer between the first high-k dielectric layer and the second electrode.

Growing community of inventors

Yongin-si, South Korea

Sunmin Moon