Samsung Electronics Co., Ltd.

Lg Electronics Inc.

Lg Display Co., Ltd.

Seoul National University

Snur & Db Foundation

Sunjung Lee

Yoonhwan Woo

CheolSe Kim

Sangsoo Hwang

BuYeol Lee

Manhyeop Han

Joowoo Lee

Kyunghye Seo

Jaewan Choi

Hyekyung Park

Jaehyun Park

Jungho Ahn

Eojin Lee

Byeongho Kim

Wonkyung Jung

Minbok Wi

Jongwook Chung

Wandon Kim

Geunwoo Kim

Hyehyun Kim

Eunkyung Choi

Heonbok Lee

Yoon Tae Hwang

Euichang Jung

Suha Yoon

Seung Wook Lee

Soojung Ryu

June-Seok Kim

Dong-Hyun Yeom

Cheolho Cheong

Hyunyeul Lee

Young-Rim Kim

Seungwoo Seo

Kyuhyung Choi

Junhee Kim

Taegun Park

Wan-Soo Lim

Dong Oh Lee

Yuhwan Ro

Jintaek Kang

Pragam Rathore

Jingoo Lee

Taik Heon Rhee

Yang-Hee Kwon

Jeonghyun Choi

Wonsik Lee

Jongkyun Shin

Jinho Song

Ji-In Won

Sung-Bin Jeon

Seungyeon Chung

Hun Rae Kim

Yongdeok Lee

Dongyoung Kim

Yong Sam Kim

Jihye Min

Jung Ho Ahn

JungMin Lee

Soomin Kim

Kwonhan Bae

Taeyong Kim

Kyunglack Kim

Hyunsu Kim

Myoungeun Kim

Jungeun Shin

Jihye Yu

Eunsoo Jung

Hyunjoo Jeon

Junghoon Chu

Heonjae Jung

Yusol Ha

Mose Jueng

Miran Han

Seongki Sohn

Hoyoung Hwang

Yongchul Shin

Sunmi Choi

Junghun Choi

Dail Eom

Yoonshinn Yang

Yunjin Cho

Jihyc Yu

Kyeonghye Seo

Seonghun Park

Namgil You

A touch display device includes a plurality of pixel electrodes; a plurality of touch electrodes configured to face the plurality of pixel electrodes, respectively, the plurality of touch electrodes including at least a first touch electrode and a second touch electrode separated from each other; a first signal line connected to the first touch electrode, the first signal line overlapping the second touch electrode without being connected to the second touch electrode; and a second signal line connected to the second touch electrode, the second signal line overlapping the first touch electrode without being connected to the first touch electrode. The first signal line and the second signal line may be configured to apply touch drive signals respectively to the first touch electrode and the second electrode during a touch driving mode.

Touch display device

A semiconductor device includes a first and second channel patterns on a substrate, each of the first and second channel patterns including vertically-stacked semiconductor patterns; a first source/drain pattern connected to the first channel pattern; a second source/drain pattern connected to the second channel pattern, the first and second source/drain patterns having different conductivity types; a first contact plug inserted in the first source/drain pattern, and a second contact plug inserted in the second source/drain pattern; a first interface layer interposed between the first source/drain pattern and the first contact plug; and a second interface layer interposed between the second source/drain pattern and the second contact plug, the first and second interface layers including different metallic elements from each other, a bottom portion of the second interface layer being positioned at a level that is lower than a bottom surface of a topmost one of the semiconductor patterns.

Semiconductor device

An accelerator, an operation method of the accelerator, and an accelerator system including the accelerator are disclosed. The operation method includes receiving one or more workloads assigned on an accelerator, determining reuse data of the workloads based on hardware resource information and/or a memory access cost of the accelerator when a plurality of processing units included in the accelerator performs the workloads, and providing a result of performing the workloads.

Operation method of an accelerator and system including the same

A touch sensor integrated display device is provided comprising gate lines and data lines formed on a substrate to be intersected with each other, a plurality of pixel electrodes formed at intersections between the gate lines and the data lines, and a common electrode formed to overlap the plurality of pixel electrodes through an insulating film disposed between the common electrode and the plurality of pixel electrodes, wherein the common electrode includes at least two touch electrodes, each of which is connected to at least one of signal lines arranged in one of a first direction and a second direction crossing the first direction.

A processor-implemented data processing method includes: generating compressed data of first matrix data based on information of a distance between valid elements included in the first matrix data; fetching second matrix data based on the compressed data; and generating output matrix data based on the compressed data and the second matrix data.

Method and apparatus with data processing

Touch sensor integrated display device

An accelerator, an operation method of the accelerator, and an accelerator system including the accelerator are disclosed. The operation method includes receiving one or more workloads assigned by a host controller, determining reuse data of the workloads based on hardware resource information and/or a memory access cost of the accelerator when a plurality of processing units included in the accelerator performs the workloads, and providing a result of performing the workloads.

A semiconductor memory device includes a plurality of memory banks including a first memory bank group including a computation circuit and a second memory bank group without a computation circuit; and a control circuit configured to control a PIM operation by the first memory bank group to be performed together with processing of memory requests for the plurality of memory banks while satisfying a maximum power consumption condition of the semiconductor memory device.

Semiconductor memory device employing processing in memory (PIM) and operation method of the semiconductor memory device

A semiconductor device includes a peripheral circuit region comprising a first substrate, circuit elements on the first substrate, a first insulating layer covering the circuit elements, and a contact plug passing through the first insulating layer and disposed to be connected to the first substrate; and a memory cell region comprising a second substrate, gate electrodes on the second substrate and stacked in a vertical direction, and channel structures passing through the gate electrodes, wherein the contact plug comprises a metal silicide layer disposed to contact the first substrate and having a first thickness, a first metal nitride layer on the metal silicide layer to contact the metal silicide layer and having a second thickness, greater than the first thickness, a second metal nitride layer on the first metal nitride layer, and a conductive layer on the second metal nitride layer.

A neural processor is provided. The neural processor includes a matrix device which is configured to generate an output feature map by processing a standard convolution operation and which has a systolic array architecture, and accelerators with an adder-tree structure which are configured to process depth-wise convolution operations for each of elements of the output feature map corresponding to lanes of the matrix device.

Neural processor

A semiconductor device includes a first and second channel patterns on a substrate, each of the first and second channel patterns including vertically-stacked semiconductor patterns; a first source/drain pattern connected to the first channel pattern; a second source/drain pattern connected to the second channel pattern, the first and second source/drain patterns having different conductivity types from each other; a first contact plug inserted in the first source/drain pattern, and a second contact plug inserted in the second source/drain pattern; a first interface layer interposed between the first source/drain pattern and the first contact plug; and a second interface layer interposed between the second source/drain pattern and the second contact plug, the first and second interface layers including different metallic elements from each other, a bottom portion of the second interface layer being positioned at a level that is lower than a bottom surface of a topmost one of the semiconductor patterns.

Growing community of inventors

Seoul, South Korea

Sunjung Lee