Cypress Semiconductor Corporation

Sunil Thamaran

Shailesh Shah

Prasad Rao Kotra

Rajat Gupta

A programmable low voltage reset apparatus for a device having a plurality of power supplies comprises a low voltage signal generator for sensing when a power supply output decreases below a predetermined voltage and generating a reset signal, a reset selector for selecting one of the power supplies, and a programmable reference voltage for varying a reference voltage according to the voltage of the selected power supply.

Programmable low voltage reset apparatus for multi-Vdd chips

An approach for testing an erasable programmable read-only memory (EPROM) cell for a threshold voltage is provided. A voltage lower than a source voltage that is associated with a read operation is applied to the gate of the EPROM cell. A signal is read out from the EPROM cell when the voltage is applied to the EPROM cell. The signal is used to calculate the threshold voltage of the EPROM cell.

Method and system for measuring threshold of EPROM cells

An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a first signal comprising a series of one or more pulses. The second circuit may be configured to generate a second signal in response to the first signal. The second signal may be configured to control the reset of an external device. In one example, the present invention may be implemented as a power on reset circuit.

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Bengaluru, India

Sunil Thamaran