Lg Display Co., Ltd.

Sungwook Chang

SungHyun Cho

Jaesung Kim

Hun Jeoung

JungChul Kim

Juhnsuk Yoo

HoYoung Lee

Jungchul Kim

SangHee Yu

ChungSik Kong

Byoungwoo Kim

DongSoo Kim

Hoonju Chung

Sewan Lee

SungWook Yoon

BoSun Lee

Kiwoo Kim

Hyungsoo Kim

Bosun Lee

Sanghee Yu

Dongsoo Kim

A light emitting display apparatus includes a pixel driving circuit including a driving transistor and an anode reset capacitor connected to a gate of the driving transistor and a light emitting device configured to emit light with a current supplied through the driving transistor. An anode reset period, where a data voltage is not supplied to the driving transistor, is between refresh periods where the light emitting device emits the light with the data voltage supplied to the driving transistor, and an anode reset voltage supplied to the anode reset capacitor in the refresh period is higher than an initial voltage which is input to the gate of the driving transistor in the refresh period.

Light emitting display apparatus

An electroluminescent display device comprises subpixels each including a pixel driving circuit driven in accordance with an initialization period, a sampling period and a light emission period. The pixel driving circuit includes a light emitting diode, a driving transistor including a gate connected to a first node, a drain connected to a second node, and a source connected to a third node, a first switching circuit turned on for the initialization period, providing an initialization voltage to the first node and providing a fixed voltage to the third node, a second switching circuit turned on for the sampling period, applying a data voltage to the third node and providing the initialization voltage to an anode of the light emitting diode, and a light emitting control circuit controlled by an emission signal and turned on for the light emission period to provide a high potential voltage to the third node.

Electroluminescent display device having pixel driving

A gate driving circuit and a display device are disclosed. The gate driving circuit includes a shift register including a plurality of stages. Among the stages, an Nth stage includes a first transistor charging a Q node and a junction stress control circuit. A pull-up transistor using the Q node as a gate input controls an output signal of a stage output terminal. The junction stress control circuit includes a first, second, and third control transistors. The first control transistor, the second control transistor, the third control transistor, and the first transistor are connected to each other through a common node. The second control transistor adjusts junction stresses for the first control transistor and the first transistor by controlling a voltage of the common node. When the second control transistor is turned off, the third control transistor discharges the voltage of the common node.

Gate driving circuit and display device using the same

An electroluminescence display device including a gate driver comprised of a plurality of stages, the gate driver comprises a kstage for providing an emission signal to an npixel row (where n and k are natural numbers and 1&#x2264;k&#x2264;n); a first controller of the kstage that is connected to the kstage and providing an input signal; and a second controller of the kstage that is connected to the kstage and receiving an output signal of the kstage as an input signal, wherein the first controller is implemented to generate a control signal for sensing the npixel row, and wherein the second controller is connected to an emission line, to which the emission signal is applied, to provide the output signal of the kstage to the emission line, and the second controller is connected to a first controller of a (k+1)stage to provide the output signal of the kstage shifted to an emission carry signal to the first controller of the (k+1)stage.

Electroluminescence display device including gate driver

An organic light emitting display apparatus comprises an organic light emitting display panel including a plurality of pixels each including an emission transistor that controls a timing in which an organic light emitting diode emits light; a gate driver outputting gate pulses to a plurality of gate lines provided in the organic light emitting display panel; an emission driver provided in the organic light emitting display panel and outputting an emission signal that controls turn-on and turn-off of the emission transistor to an emission line connected to the emission transistor; a data driver outputting data voltages to a plurality of data lines provided in the organic light emitting display panel; and a controller supplying a first signal and a second signal to the emission driver through one transfer line, wherein the first signal is generated for driving the emission driver when each frame starts, and the second signal is generated for driving the emission driver and has a period shorter than one frame period, and wherein the emission driver generates the emission signal through an emission start signal transferred through the one transfer line.

Organic light emitting display apparatus

Provided is a gate shift register including a plurality of stages receiving a plurality of clocks to generate gate output signals, in which an n-th stage of the stages dependently connected to each other includes an output node outputting an n-th gate output signal, a pull-up TFT switching a current flow between an input terminal of a clock having an n-th phase and the output node according to a potential of a Q node, a pull-down TFT switching the current flow between an input terminal of a low potential voltage and the output node according to a potential of a QB node, appnd a BTS compensation unit periodically discharging the QB node at a low potential level just after the n-th stage is reset and just until the n-th stage is set in a next frame.

Gate shift register and display device using the same

A gate driver and a display device including the gate driver are provided which can prevent an abnormal output of a gate-high voltage from a stage by stably maintaining a discharge potential of a pull-up node. The gate driver includes a plurality of stages, and each stage includes a pull-up transistor that outputs a clock signal input to a first clock terminal to an output terminal depending on a voltage of a pull-up node; a pull-down transistor that outputs a first source voltage input to a first source voltage terminal to the output terminal depending on a voltage of a pull-down node; and a first noise removing unit that supplies a gate-off voltage to the pull-up node to remove noise of the pull-up node in response to the clock signal input to the first clock terminal.

Gate driver and display device including the same

A display panel and a method of driving the same are disclosed. The display panel includes a shift register with a plurality of stages configured to shift and to output a scan pulse for a plurality of scan lines. Each stage includes a pull-up transistor and a pull-down transistor coupled in series and defining an output node therebetween, a driver with a first node coupled to a gate electrode of the pull-up transistor and a second node coupled to a gate electrode of the pull-down transistor; and a node controller coupled to the first node, the second node, and the output node. In each stage, the node controller is configured to selectively apply a reference voltage at the first node and the second node in response to a control signal.

Growing community of inventors

Gyeonggi-do, South Korea

Sungwook Chang