Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Dongguk University Industry-academic Cooperation Foundation

SungMin Kim

Ming Li

Eungjung Yoon

Byounguk Yoon

Jongchul Choi

Keunnam Kim

Yongchul Oh

Sungkwang Yang

Semyeong Jang

Sang Hoon Hong

Donggun Park

Kyoungjin Ahn

Yeongmin Park

Myung-Sook Jung

Jeonggeun Yoo

Wonha Kim

Hyo Joon Kim

Eunjung Yoon

An electronic device according to an embodiment may include at least one display, a main frame to which the at least one display is mounted, a first support frame which is connected to the main frame through a first connector and includes a first antenna, a second support frame which is connected to the main frame through a second connector and includes a second antenna, at least one processor, and at least one sensor. The at least one processor may perform, when the at least one sensor detects that the electronic device is unfolded, wireless communication using the first antenna and the second antenna, and, when the at least one sensor detects that the electronic device is folded, may turn off the first antenna and/or the second antenna, connect first antenna and/or the second antenna to a ground, or shift a resonance frequency of first antenna and/or the second antenna.

Method for improving antenna performance in electronic device comprising a plurality of antennas and device thereof

A display device and a method of testing the display device. The display device includes a substrate including both a display region on which pixel cells are located and a peripheral region; test pads, main pins connected to the pixel cells, and dummy pins that are respectively connected to the test pads, the test pads, the main pins, and the dummy pins being on the peripheral region of the substrate, and visual test lines on the peripheral region of the substrate. The visual test lines include a first portion connected to the main pins and a second portion connected to the test pads, and the first and second portions are disconnected from each other.

Display device and method of testing the same

Provided is a medical headlamp including a main body put on a head, a driving unit installed and connected to one side of the main body and to provide a driving force, a location adjustment unit installed and connected to one side of the driving unit, a lamp unit installed and connected to one side of the location adjustment unit to move along with a movement of the location adjustment unit, and irradiate light onto one side of a front end thereof, a capturing unit installed and connected to one side of the main body and to capture eye locations, a control unit installed and connected to the driving unit and the capturing unit to analyze an image captured by the capturing unit, calculate the eye locations, and operate the driving unit according to the calculated eye calculation, and a power supply unit installed and connected to the control unit, the driving unit, and the lamp unit and to apply a current thereto.

Medical headlamp for tracking eye locations

In a semiconductor device, and a method of fabricating the same, the semiconductor device includes a semiconductor substrate having a cell region and a peripheral circuit region, a portion of the semiconductor substrate in the cell region and in the peripheral circuit region including an isolation region defining an active region, a portion of the active region protruding above an upper surface of the isolation region to define at least two active channels, a gate dielectric layer formed over the active region of the semiconductor substrate including the at least two protruding active channels, a gate electrode formed over the gate dielectric layer and the isolation region of the semiconductor substrate, and a source/drain region formed in the active region of the semiconductor substrate on either side of the gate electrode.

Semiconductor device including a multi-channel fin field effect transistor including protruding active portions and method of fabricating the same

In a field effect transistor (FET), and a method of fabricating the same, the FET includes a semiconductor substrate, source and drain regions formed on the semiconductor substrate, a plurality of wire channels electrically connecting the source and drain regions, the plurality of wire channels being arranged in two columns and at least two rows, and a gate dielectric layer surrounding each of the plurality of wire channels and a gate electrode surrounding the gate dielectric layer and each of the plurality of wire channels.

Method of fabricating field effect transistor (FET) having wire channels

Field effect transistor (FET) having wire channels and method of fabricating the same

Growing community of inventors

Yongin, South Korea

SungMin Kim