Samsung Electronics Co., Ltd.

Lg Electronics Inc.

Samsung Display Co., Ltd.

Lg Display Co., Ltd.

Seoul National University

Lg Innotek Co., Ltd.

Naver Corporation

Other

Kabushiki Kaisha Yaskawa Denki

Arkray, Inc.

Soongsil University

Hojeon Limited

Hass Corp.

Sungmin Kim

Jongseok Kim

Daeyun Park

Daewon Ha

Sogkie Hong

Heonjong Shin

Deokhan Bae

Jihyun Kim

Keun Hwi Cho

Min-Hee Lee

Dongwon Kim

Byoungki Choi

Youngjoo Lee

Yongjin Kim

Jong Hyun Lee

Jaehyun Park

Ohyun Kwon

Sung-Dae Suk

Jaewook Lee

Jaesung Lee

Kihuk Lee

Jongchul Choi

Byounguk Yoon

Kyuyoung Hwang

Seungyeon Kwak

Hyungjun Kim

Changhwan Lee

Mingyu Jo

Yunsup Shin

Jinbum Kim

Dasom Lee

Sangdong Kim

Kum Hee Lee

Jaehoon Kim

Sunghun Lee

Jae Wook Lee

Myungsun Sim

Jaeho Choi

Sanghee Lee

Kyungin Choi

Chiwook An

Jeongyun Kim

Seunghun Lee

Jinyoung Park

Yong Joo Lee

Banglin Lee

Yuri Lee

Jinsang Lee

Juhun Park

Soonmoon Jung

Yoonyoung Jung

Sooyeon Hong

Hangyul Kim

Seunghwan Bang

HyoJin Kim

Changseop Yoon

Sunhom Steve Paak

Seungchul Park

Youngman Kwon

Byeongrim Jo

Sungryong Kim

Sunho Yang

Bumwoo Park

Virendra Kumar Rai

Ayoung Cho

Jaehoo Park

Yungwoo Jung

Youngjin Lee

Juhnho Park

Yeonhak Kim

Kiyoung Lee

Woosik Jeon

Shinya Morimoto

Jaeyoung Choi

Kidong Kim

SeWon Kim

Muhyun Kim

Jinwoong Kim

Sungmin Park

Kozo Ide

Nakcho Choi

Jonghun Song

Seung-Ki Sul

Doohyun Lee

Hwayoung Cho

Byungjoon Kang

Jeoungin Yi

Yeonoh Nam

Young Chul Park

Hyunho Park

Junhee Lee

Haejun Yu

Jayong Lee

Jaehyeok Kim

Hyunduck Cho

Yasushi Koishikawa

Myongyoung Lee

Myungyoon Um

Bin Liu

Seokpan Kang

A semiconductor device includes first and second channels, first and second gate structures, first and second source/drain layers, first and second fin spacers, and first and second etch stop patterns. The first channels are disposed vertically on a first region of a substrate. The second channels are disposed vertically on a second region of the substrate. The first gate structure is formed on the first region and covers the first channels. The second gate structure is formed on the second region and covers the second channels. The first and second source/drain layers contact the first and second channels, respectively. The first and second fin spacers contact sidewalls and upper surfaces of the first and second source/drain layers, respectively. The first and second etch stop patterns are formed on the first and second fin spacers, respectively, and do not contact the first and second source/drain layers, respectively.

Semiconductor devices including source/drain layers and methods of manufacturing the same

Integrated circuit devices may include a fin-type active region, a gate line extending on the fin-type active region, a source/drain region on the fin-type active region and adjacent to the gate line, an interlayer insulating film covering the source/drain region, a source/drain contact hole penetrating the interlayer insulating film toward the source/drain region, a metal plug in the source/drain contact hole, and a conductive barrier film covering a sidewall of the metal plug in the source/drain contact hole. The metal plug includes a lateral expansion portion and a through portion vertically extending from the lateral expansion portion toward the source/drain region. A width of the lateral expansion is greater than a width of the through portion, and a topmost surface of the conductive barrier film is closer than a topmost surface of the metal plug to the substrate.

Integrated circuit devices and methods of manufacturing the same

An organometallic compound represented by Formula 1, an organic light-emitting device including the organometallic compound, and an electronic apparatus including the organic light-emitting device:M(L)(L)  Formula 1

Organometallic compound, organic light-emitting device including organometallic compound, and electronic apparatus including organic light-emitting device

Provided are an organometallic compound represented by Formula 1, an organic light-emitting device including the organometallic compound, and a diagnostic composition including the organometallic compound.M(Ln)(Ln)  Formula 1

Organometallic compound, organic light-emitting device including the same, and diagnostic composition including the organometallic compound

A semiconductor device is provided. The semiconductor device includes: an active pattern provided on a substrate having an upper surface; an insulation pattern provided above the substrate and contacting an upper surface of the active pattern; channels spaced apart from each other along a direction perpendicular to the upper surface of the substrate, each of the channels including a material provided in the active pattern; and a gate structure contacting an upper surface of the insulation pattern, an upper surface of the channels, a lower surface of the channels, and sidewalls of the channels opposite to each other. A first distance between an upper surface of the active pattern and a lowermost one of the channels is greater than a second distance between an upper surface of one of the channels and a lower surface of an adjacent channel.

Multi-bridge channel field effect transistor with reduced gate-channel leakage current

A wearable electronic device includes a display component, wearing frames extending from the display component, and an adjusting component slidably coupled with the wearing frames, the adjusting component including a case including first slide holes extending in a first direction, first slide members provided inside the case and coupled with one of the wearing frames through one of the first slide holes, second slide members coupled with the first slide members, respectively, and a driving structure provided in the case, where, with rotation of the driving structure, the second slide members are configured to slide the first slide members in the first direction while moving in a second direction different from the first direction.

Wearable electronic device including adjusting part

A display panel includes a first display area in which first light-emitting diodes are arranged, a second display area at least partially surrounded by the first display area and in which display element groups including second light-emitting diodes and a transmission area are arranged, a light-shielding insulating layer defining a light-emitting area of each of the first light-emitting diodes and the second light-emitting diodes, and an anti-reflection layer on the light-shielding insulating layer and including a light-shielding layer and color filters, where, in a plan view, an outermost line of the transmission area is defined by a curved edge of at least one of the light-shielding layer and the light-shielding insulating layer.

Display panel and electronic apparatus including the same

A semiconductor device is provided that includes a base substrate, an insulating film on the base substrate, and an upper substrate on the insulating film. The insulating film includes a crystalline insulating material. A thickness of the insulating film is about 1 nm to about 1,000 nm, and a thickness of the upper substrate is about 1 nm to about 100 nm.

Semiconductor device

An organometallic compound represented by Formula 1:M(L)(L)  Formula 1

Organometallic compound, organic light-emitting device including the same, and electronic apparatus including the organic light-emitting device

A processor of a route providing device provided in a server according to an embodiment of the present invention: at the time of entry into a cruise control mode for causing a vehicle to travel at a speed configured by a user, causes the vehicle to travel at the configured speed in a first lane in which the vehicle is current travelling; and, when another vehicle, which is travelling at a speed slower than the configured speed in front of the vehicle, is sensed through a sensor provided in the vehicle, controls the vehicle in a preconfigured manner.

Route providing device and route providing method therefor

A semiconductor device includes an active pattern including a channel region. The channel region is disposed between first and second source/drain patterns that are spaced apart from each other in a first direction. The channel region is configured to connect the first and second source/drain patterns to each other. A gate electrode is disposed on a bottom surface of the active pattern and is disposed between the first and second source/drain patterns. An upper interconnection line is disposed on a top surface of the active pattern opposite to the bottom surface of the active pattern and is connected to the first source/drain pattern.

An integrated circuit device according to the inventive concept includes: a fin-type active area protruding from a substrate and extending in a first horizontal direction; a stopper layer that is above and spaced apart from the fin-type active area; a gate electrode extending in a second horizontal direction orthogonal to the first horizontal direction, on the fin-type active area, and in a space between the fin-type active area and the stopper layer; and a gate capping layer on upper surfaces of the gate electrode and the stopper layer.

Integrated circuit devices having uniformly formed structure

An electronic device includes a camera module including an optical image stabilization device, a memory, and a processor, and the optical image stabilization device includes a first direction driver, a first driver circuit that controls the first direction driver, a second direction driver, and a second driver circuit that controls the second direction driver, and the first direction driver monitors a movement amount of the second direction driver from a control signal transmitted from the processor, determines a first correction amount corresponding to the movement amount, and controls the first direction driver based on the first correction amount. Additional various embodiments identified through the specification are possible.

Electronic device including camera with blur reduction

Methods of forming a semiconductor device and semiconductor device formed by the methods are provided. The methods of forming a semiconductor device may include providing a first substrate and a first bonding layer that is provided on the first substrate, forming a sacrificial pattern and an active pattern on a second substrate, forming a second bonding layer on the active pattern, bonding the second bonding layer onto the first bonding layer, removing the second substrate, and removing the sacrificial pattern to expose the active pattern. Forming the sacrificial pattern and the active pattern on the second substrate may include forming a preliminary sacrificial pattern and the active pattern on the second substrate and oxidizing the preliminary sacrificial pattern. The preliminary sacrificial pattern and the active pattern may be sequentially stacked on the second substrate.

Methods of forming a semiconductor device including active patterns on a bonding layer and semiconductor devices formed by the same

A semiconductor device includes a first active (e.g., PMOSFET) region and an adjacent second active (e.g., NMOSFET) region on a substrate, a device isolation layer on the substrate and defining a first active pattern on the first active region and a second active pattern on the second active region, a gate electrode crossing the first and second active patterns, a first source/drain pattern and a second source/drain pattern adjacent to a side of the gate electrode, an interlayer insulating layer on the gate electrode, a first active contact penetrating the interlayer insulating layer to connect the first source/drain pattern and a second active contact penetrating the interlayer insulating layer to connect the second source/drain pattern and a buffer layer provided in an upper region of the interlayer insulating layer and interposed between the first active contact and the second active contact, wherein the buffer layer includes a material having etch selectivity with respect to the interlayer insulating layer.

Growing community of inventors

Seoul, South Korea

Sungmin Kim