Sony Semiconductor Solutions Corporation

Pixim, Incorporated

Sony Corporation

Sungin Hwang

Frederick T Brady

Pooria Mostafalu

Thomas Ayers

Adarsh Basavalingappa

Jinsuk Kang

Taisuke Suwa

Michiel Timmermans

Sen Yu

Sozo Yokogawa

Ward Van Der Tempel

Yoshiaki Tashiro

Timmermans Michiel

Cristian Tivarus

A sensor chip including a resistor and a backside illuminated single photon avalanche diode (SPAD) that is connected to the resistor; and a sensor including a sensor chip with a resistor and a backside illuminated SPAD that is connected to the resistor. The backside illuminated SPAD including an anode, a cathode, and a multiplication structure.

Backside illuminated single photon avalanche diode

An imaging device includes a first pixel. The first pixel includes a first photoelectric conversion region disposed in a first substrate and that converts incident light into first electric charges. The first pixel includes a first readout circuit including a first converter that converts the first electric charges into a first logarithmic voltage signal. The imaging device includes at least one bonding pad on the first substrate and in electrical contact with the first converter. The at least one bonding pad overlaps at least part of the first pixel.

Imaging devices and imaging apparatuses, and methods for the same

An imaging device includes a first pixel including a first photoelectric conversion region disposed in a first substrate and that converts incident light into first electric charges, and a first readout circuit including a first converter that converts the first electric charges into a first logarithmic voltage signal. The first converter includes a first transistor coupled to the first photoelectric conversion region and a second transistor coupled to the first transistor. The imaging device includes a wiring layer on the first substrate and includes a first level of wirings arranged in a first arrangement overlapping the first photoelectric conversion region and in a second arrangement overlapping the first and second transistors, the second arrangement being different than the first arrangement.

An imaging device includes a pixel including a photoelectric conversion region, a first transfer transistor coupled to the photoelectric conversion region, a first floating diffusion, a second floating diffusion, a second transfer transistor coupled between the first floating diffusion and the second floating diffusion to control access to the second floating diffusion, a third transfer transistor coupled to the photoelectric conversion region, a third floating diffusion coupled, a fourth floating diffusion, and a fourth transfer transistor coupled between the third floating diffusion and the fourth floating diffusion to control access to the fourth floating diffusion. The imaging device includes a first wiring layer including a first wiring connected to the second floating diffusion, a second wiring connected to the fourth floating diffusion, and a third wiring connected to ground and capacitively coupled with the first wiring and the second wiring.

Capacitance matched metal wirings in dual conversion gain pixels

A pixel array includes a plurality of pixels. Each pixel includes a photoelectric conversion region that converts incident light into electric charge, and a charge transfer section coupled to the photoelectric conversion region and having line symmetry along a first axis in a plan view. The charge transfer section includes a first transfer transistor coupled to a first floating diffusion and the photoelectric conversion region and located at a first side of the photoelectric conversion region, and a second transfer transistor coupled to a second floating diffusion and the photoelectric conversion region and located at the first side of the photoelectric conversion region.

Imaging devices with gated time-of-flight pixels with fast charge transfer

A light receiving element includes: a first tap; a second tap; a first photoelectric conversion unit configured to detect a charge generated by photoelectric conversion according to a light amount of incident light in accordance with a voltage applied to the first tap; a second photoelectric conversion unit configured to detect a charge generated by photoelectric conversion according to a light amount of the incident light in accordance with a voltage applied to the second tap; a plurality of accumulation units configured to accumulate the charges generated by the first photoelectric conversion unit and the second photoelectric conversion unit; a plurality of transmission units configured to transmit the charges generated by the first photoelectric conversion unit and the second photoelectric conversion unit to the plurality of accumulation units; and a calculation unit configured to execute calculation based on the charges accumulated in the plurality of accumulation units.

Light receiving element and ranging module

An image sensor including an array of pixel elements is operated according to two operation modes to modulate the conversion gain of the pixel to operate the image sensor based on the impinging light conditions. More specifically, an image sensor pixel element is operated in a high conversion gain mode for low light conditions and in a low conversion gain mode for bright light conditions. The low conversion gain mode implements charge sharing between the floating diffusion and the photodiode. The low conversion gain mode further implements partial reset where the photodiode and the floating diffusion are reset to the same potential and to a potential slightly less than the pinning voltage of the photodiode.

Conversion gain modulation using charge sharing pixel

An image sensor includes a pixel circuit that includes a light sensing element and a charge storage node formed in a substrate, an output element having a control electrode formed in an electrode layer above the substrate, the output element generating an output signal corresponding to charge generated by the light sensing element and held by the charge storage node, and a local metal interconnect that electrically connects the charge storage node to the control electrode. Control wirings that control operations of the pixel circuit are formed in wiring layers that are located above the electrode layer. The metal interconnect is formed in a layer that is located above the electrode layer and below a lowest one of the wiring layers such that a given one of the control wirings overlaps the metal interconnect so as to form a parallel plate capacitor in a region of overlap.

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Pittsford, NY, United States of America

Sungin Hwang