Samsung Electronics Co., Ltd.

Sunghawn Bae

Won Suk Choi

Doohwan Lee

Yongjin Park

Jooyoung Choi

Sunghoan Kim

Jeongrim Seo

Provided is method of manufacturing a semiconductor device. The method includes: forming a metal layer on a carrier; forming a conductor pattern layer on the metal layer; mounting a semiconductor chip on a tape; forming an encapsulant covering the semiconductor chip; attaching the conductor pattern layer to the encapsulant; removing the tape; and forming a connection structure electrically connected to the semiconductor chip in an area from which the tape is removed.

Semiconductor package

A semiconductor package includes: a redistribution substrate; a frame including first and second vertical connection conductors, and having a through-hole; first and second semiconductor chips; an encapsulant; a second redistribution structure disposed on the encapsulant, a conductive wire electrically connecting the second semiconductor chip and the second vertical connection conductor; and a vertical connection via penetrating a portion of the encapsulant, and electrically connecting the second redistribution structure and the first vertical connection conductor. The first semiconductor chip is connected to the second vertical connection conductor by the first redistribution structure.

A semiconductor package includes a redistribution layer, a semiconductor chip disposed on the redistribution layer and an expanded layer surrounding the semiconductor chip, connection terminals on the expanded layer, and a wiring structure electrically connecting the redistribution layer to the connection terminals. Each of the connection terminal includes a seed layer, a terminal base layer including a terminal groove exposing a part of an upper surface of the seed layer on the seed layer and formed of a first metal, a terminal cover layer including a barrier portion filling the terminal groove and a cover base portion covering the barrier portion and the terminal base layer and formed of a second metal, and a terminal protective layer covering the terminal cover layer and formed of a third metal.

Semiconductor package and package-on-package devices including same

The invention provides a semiconductor package, which may include a connection structure including one or more redistribution layers. A semiconductor chip is disposed on the connection structure and has an active surface on which a connection pad electrically connected to the redistribution layer is disposed and an inactive surface opposite to the active surface. An encapsulant is disposed on the connection structure and covers at least a portion of the inactive surface of the semiconductor chip. A conductor pattern layer is embedded in the encapsulant such that one exposed surface of the conductor pattern layer is exposed from the encapsulant. A metal layer is disposed on the encapsulant and covers the one exposed surface of the conductor pattern layer.

The present invention provides a fan-out semiconductor package, and the fan-out semiconductor package includes a semiconductor chip, an encapsulant covering the semiconductor chip, a connection structure disposed below the semiconductor chip and including a redistribution layer, and first and second metal pattern layers disposed on different levels on the semiconductor chip. The first metal pattern layer is to electrically connect to an electrical connection member such as a frame, provided for electrical connection of the fan-out semiconductor package in a vertical direction through a path via the second metal pattern layer.

Growing community of inventors

Suwon-si, South Korea

Sunghawn Bae