Samsung Electronics Co., Ltd.

Sunggi Hur

Woocheol Shin

Junghan Lee

Sangwon Baek

Junggun You

Sungil Park

Joohee Jung

Jaeho Jeon

Seungchul Oh

Chankyo Park

A method of manufacturing a semiconductor device is provided. The method includes: forming, on a substrate, dummy gate structures extending in a first direction, spaced apart from one another along a second direction, forming a first oxide layer on the dummy gate structures, etching an upper portion of the first oxide layer and the dummy gate to form a recess region, providing a first nitride layer in the recessed region, forming a second oxide layer on the first nitride layer and the first oxide layer, partially removing upper portions of the first oxide layer and the second oxide layer and providing a second nitride layer on the first and second oxide layers.

Method of manufacturing semiconductor device

A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are stacked in a vertical direction. Each channel extends in a first direction. The gate structure extends in a second direction. The gate structure covers the channels. The source/drain layer is connected to each of opposite sidewalls in the first direction of the channels on the substrate, and includes a doped semiconductor material. The source/drain layer includes first and second epitaxial layers having first and second impurity concentrations, respectively. The first epitaxial layer covers a lower surface and opposite sidewalls in the first direction of the second epitaxial layer. A portion of each of opposite sidewalls in the first direction of the gate structure protrudes in the first direction from opposite sidewalls in the first direction of the channels to partially penetrate through the first epitaxial layer but not to contact the second epitaxial layer.

Semiconductor devices and methods of manufacturing the same

A semiconductor device includes a substrate including first and second active regions extending in a first direction and isolated from direct contact with each other in the first direction; a device isolation layer between the first and second active regions in the substrate; and first and second gate structures extending in a second direction on the substrate while respectively intersecting end portions of the first and second active regions. The first gate structure includes a first gate electrode. The second gate structure includes a second gate electrode. The first gate structure protrudes further toward the device isolation layer, as compared to the second gate structure, in a vertical direction that is perpendicular to the first and second directions, and a lower end of the first gate electrode is located on a lower height level than a lower end of the second gate electrode.

Semiconductor devices having reflective symmetry

Semiconductor devices having asymmetrical structures

Growing community of inventors

Hwaseong-si, South Korea

Sunggi Hur