Lg Display Co., Ltd.

SungGae Lee

Dong-Woo Lee

BuYeol Lee

HeeJung Hong

Jongjin Lim

A display device and a method of driving the same. The display device includes a display panel on which a plurality of data lines and a plurality of gate lines intersect each other to form a matrix, with a number of pixels being defined at intersections of the plurality of data lines and the plurality of gate lines. A data driver is connected to the plurality of data lines. A gate driver is connected to the plurality of gate lines. A timing controller controls the display panel to operate in a driving mode that changes depending on image signals.

Device for changing driving frequency

Disclosure are a display device that provides effective partitive driving using an optimal signal line structure, and provides partial driving that effectively drive a partial area under the signal line structure and partial driving, and a gate driving method thereof.

Gate driving method and display device

Disclosed is a display device configured to decrease power consumption. The device comprises a display panel having a plurality of data lines and gate lines crossing in a matrix form, wherein a pixel is defined at each crossing thereof; a data driver connected to the plurality of data lines and supplying analog data voltages converted from digital data voltages to odd data lines and even data lines respectively according to an odd gamma reference voltage and an even gamma reference voltage; a gamma generator outputting one of a positive gamma reference voltage and a negative gamma reference voltage as the odd gamma reference voltage, and one of the positive gamma reference voltage and the negative gamma reference voltage as the even gamma reference voltage to the data driver; and a timing controller generating a control signal for driving the display panel.

Display device

The present invention relates to a liquid crystal display, wherein the liquid crystal display includes a POL conversion control signal generating unit for generating a POL conversion control signal that is inverted at predetermined time intervals in a black data insertion mode and is fixed at a specific logic level in a normal drive mode, a timing controller for outputting a first polarity control signal that is inverted every a predetermined period, a POL conversion circuit that receives the POL conversion control signal and the first polarity control signal to output a second polarity control signal, a data driving circuit that supplies a data voltage to data lines and inverts a polarity of the data voltage in response to the second polarity control signal, and a gate driving circuit that sequentially supplies a gate pulse to gate lines.

Growing community of inventors

Gunpo-si, South Korea

SungGae Lee