Samsung Electronics Co., Ltd.

Sungeun Pyo

Jongbo Shim

Jungwoo Kim

Chajea Jo

Sang-Uk Han

Doohwan Lee

Ji Hwang Kim

Kyoungsei Choi

Choongbin Yim

Jihwang Kim

Jungsoo Byun

Junggon Choi

A semiconductor package includes: a redistribution layer including a plurality of redistribution insulating layers, a plurality of redistribution line patterns that constitute lower wiring layers, and a plurality of redistribution vias that are connected to some of the plurality of redistribution line patterns while penetrating at least one of the plurality of redistribution insulating layers; at least one semiconductor chip arranged on the redistribution layer; an expanded layer surrounding the at least one semiconductor chip on the redistribution layer; and a cover wiring layer including at least one base insulating layer, a plurality of wiring patterns that constitute upper wiring layers, and a plurality of conductive vias that are connected to some of the plurality of wiring patterns while penetrating the at least one base insulating layer.

Semiconductor package, and package on package having the same

A semiconductor package including a first substrate including first upper pads, the first upper pads on a top surface of the first substrate, a second substrate including second upper pads, the second upper pads on a top surface of the second substrate, a pitch of the second upper pads being less than a pitch of the first upper pads, and a first semiconductor chip on and electrically connected to both (i) at least one of the first upper pads and (ii) at least one of the second upper pads may be provided.

Semiconductor package

Growing community of inventors

Suwon-si, South Korea

Sungeun Pyo