Hewlett Packard Enterprise Development LP

Sung Won Chung

Frederick A Perner

Jae Yun Yi

Jinwon Park

Kwangmyoung Rho

Sangmin Hwang

Jeong Hwan Kim

Jae Yeon Lee

In one example, a three dimensional resistive memory architecture includes adjacent memory tiles with each tile including a multilevel resistive crossbar array and at least one decoder. The multilevel crossbar array includes layers of row crossbars, layers of column crossbars, and layers of resistive memory elements interposed between cross points of the row crossbars and the column crossbars, in which at least one layer of crossbars extends from a first tile through an adjacent tile and is used to address resistive memory elements in the adjacent tile. The at least one decoder underlies the multilevel resistive crossbar array and includes an address matrix comprising digital lines and analog lines, in which the digital lines select which crossbars are connected to the analog lines.

Three dimensional resistive memory architectures

Growing community of inventors

Icheon, South Korea

Sung Won Chung