Samsung Electronics Co., Ltd.

Sung-won Choi

Young-sik Park

Chang-Ho Han

Min-keun Kwak

Han-Hum Park

Jong-Ho Lee

Jin-Young Lee

Ja-hum Ku

Hyun-jeong Lee

Yong-Kug Bae

Tae-sun Kim

Dae-Wook Kim

Sang-Jin Choi

Bum-Joon Youn

Yi-Gwon Kim

Yong-chul Kim

Byoung-Hoon Kim

Byoung-hoon Kim

Hee-Ho Ku

Ga-Hyun Yang

A semiconductor device includes a semiconductor substrate including an in-cell area and a scribe lane defining the in-cell area, a first overlay pattern on the semiconductor substrate, and a second overlay pattern adjacent to the first overlay pattern, wherein the first overlay pattern is a diffraction-based overlay (DBO) pattern and the second overlay pattern is a scanning electron microscope (SEM) overlay pattern.

Semiconductor device having overlay pattern

A semiconductor device includes a substrate including at least two semiconductor chip regions and a scribe lane region disposed between the semiconductor chip regions. The semiconductor device additionally includes a first optical measurement pattern disposed on the substrate. The semiconductor device further includes a second optical measurement pattern disposed on an upper layer of the first optical measurement pattern, the second optical measurement pattern being spaced apart from the first optical measurement pattern. The semiconductor device additionally includes a three-dimensional (3D) shielding structure surrounding the first optical measurement pattern and including an electrically conductive material.

Semiconductor device including an optical measurement pattern

A method for fabricating a semiconductor device includes obtaining first raw data by measuring an overlay of a semiconductor wafer of a first lot and generating a regression equation based on the first raw data. A semiconductor wafer of a second lot is aligned based on a coefficient of the regression equation, second raw data is obtained by measuring an overlay of the aligned semiconductor wafer of the second lot, and the regression equation is corrected based on the second raw data. Correction of the regression equation includes dividing the regression equation into an initial equation and a residual equation excluding the initial equation from the regression equation, correcting a coefficient of the initial equation; and correcting a coefficient of the residual equation.

Method and apparatus for fabricating semiconductor device

A processing method includes processing a wafer based on initial data, measuring errors for each of the plurality of areas, calculating an error similarity of at least some of the plurality of areas as a function of a separation distance between each pair of some of the areas, selecting a first area and a plurality of second areas adjacent to the first area, calculating weight values for the second areas based on the error similarities between each pair of second areas and the error similarities between the first area and each second area, calculating an estimated error of the first area based on the measured errors of the second areas and the weight values for the second areas, and generating estimated data based on the estimated errors for each of the plurality of areas.

Method of calibrating target values and processing systems configured to calibrate the target values

A method for making a semiconductor device includes forming a trench in a first layer on a substrate. A conductive layer having a pattern is formed in the trench. A first metal gate electrode is formed on the conductive layer, and a second metal gate electrode is formed on the first metal gate electrode. The first and second metal gate electrodes at least partially conform to the pattern of the conductive layer. Widths of first surfaces of the first and second metal gate electrodes are different from respective widths of second surfaces of the first and second metal gate electrodes as a result of the pattern.

Method for fabricating semiconductor device

Growing community of inventors

Yongin-si, South Korea

Sung-won Choi