Maxim Integrated Products, Inc.

Analog Devices,inc.

Sung Ung Kwak

Robert Michael Muchsel

Edward Tangkwai Ma

Gary V Zanders

Donald Wood Loomis, Iii

Pirooz Parvarandeh

Hung Thanh Nguyen

Khankap Mounarath

Ashutosh Ravindra Joharapurkar

Irfan Azam Chaudhry

Nancy Kow Iida

Tangkwai Ma

Jianxin Ma

Kristopher Leigh Ardis

Nancy Kow Lida

Mark Henry Weldele

Levi Victor

Kenneth Tang

An energy-efficient multiplication circuit uses analog multipliers and adders to reduce the distance that data has to move and the number of times that the data has to be moved when performing matrix multiplications in the analog domain. The multiplication circuit is tailored to bitwise multiply the innermost product of a rearranged matrix formula generate a matrix multiplication result in form of a current that is then digitized for further processing.

Systems and methods for energy-efficient analog matrix multiplication for machine learning processes

A novel energy-efficient multiplication circuit using analog multipliers and adders reduces the distance data has to move and the number of times the data has to be moved when performing matrix multiplications in the analog domain. The multiplication circuit is tailored to bitwise multiply the innermost product of a rearranged matrix formula to output the generate a matrix multiplication result in form of a current that is then digitized for further processing.

Systems and methods allow to take advantage of the natural statistical variation of physical properties in a semiconductor device in order to create truly random, repeatable, and hard to detect cryptographic bits. This may be accomplished by recursively pairing mismatch values of Physically Unclonable Functions (PUF) elements so as to ensure that generated PUF key bits remain insensitive to environmental errors, without affecting the utilization rate of available PUF elements. The pairing process may be applied to any given hardware to generate more stable PUF bit sequences that provide a higher margin of error, increase the number of bits for a given margin of error, or any combination thereof.

Systems and methods for stable physically unclonable functions

Security devices for protecting ICs from backside security attacks. A security device includes an N&#x2212; well formed in a substrate, a P+ center disposed in the central region of the N&#x2212; well, and a P+ ring surrounding the N&#x2212; well. To prevent latchup, a pair of inner and outer N+ rings is formed in the N&#x2212; well. When a current source is applied to the P+ center, the current flows through a portion of the substrate and is picked up by the P+ ring. When an attacker mills the substrate or makes a trench in the substrate, the resistance of the substrate changes. By monitoring the voltage difference between the P+ center and P+ ring, the attempt to attack the die can be detected.

Detecting and thwarting backside attacks on secured systems

Various embodiments of the invention allow to effectively reduce device and system power consumption in both active and inactive modes without compromising performance, without large area overhead, and at low cost. In certain embodiments, the reduction of power consumption is accomplished by combining circuit control techniques with power gating methods to reduce power loss due to leakage current.

System and method for adaptive power management

Various embodiments of the invention relate to secure systems and modules, and more particularly, to systems, devices and methods of generating and applying identification elements uniquely associated with memory, memory mapping and encrypted storage. These unique identification elements provide an improved, statistically random source from which keys and memory mappings may be derived. The application of these keys across various architectures result in an improvement in the security of data stored within a system.

Secure memories using unique identification elements

The invention relates to systems having linear regulators and methods of operating the systems. The system includes: a linear regulator responsive to an input voltage and operative to output a regulated voltage; a first circuit responsive to the regulated voltage and configured to operate at a first voltage difference between the regulated voltage and a ground level; and a second circuit responsive to the input voltage and the regulated voltage and configured to operate at a second voltage difference between the input voltage and the regulated voltage. The second circuit is coupled to the first circuit so that an entire portion of a current flowing through the second circuit is configured to enter into the first circuit during operation, wherein the current flowing through the second circuit bypasses the linear regulator.

Energy efficient systems having linear regulators and methods of operating the same

Various embodiments of the invention allow to take advantage of the natural statistical variation of physical properties in a semiconductor device in order to create truly random, repeatable, and hard to detect cryptographic bits. In certain embodiments, this is accomplished by pairing mismatch values of PUF elements so as to ensure that PUF key bits generated thereform remain insensitive to environmental errors, without affecting the utilization rate of available PUF elements.

The invention relates to semiconductor devices, and more particularly, to systems, devices and methods of utilizing inherent differences among physical elements in an electrical component to generate unique and non-duplicable numbers that are statistically random and repeatable. These bits may be applied as identifications, random number seeds or encryption keys in many security applications, e.g., a financial terminal. An integrator is coupled to a plurality of physical elements, selects two physical elements or element sets, and generates an integrated difference signal according to a difference between these two physical elements or element sets. A comparison-decision logic further determines whether the difference between the selected two physical elements is associated with a bit of '1' or '0'. In some embodiments, a multi-bit number constitutes multiple bits each of which may be derived from a difference between two randomly selected physical elements or element sets.

System and method with specific ordered execution over physical elements

Various embodiments of the invention relate to secure systems and modules, and more particularly, to systems, devices and methods of generating and applying identification elements uniquely associated with modules or elements. These unique identification elements provide an improved, statistically random source from which keys may be derived. The application of these keys across various architectures result in an improvement in the security of data communicated within a system.

Secure modules using unique identification elements

The invention relates to a magnetic stripe reader, and more particularly, to systems, devices and methods of directly extracting binary information embedded in a magnetic stripe using simple analog and digital signal processing techniques. Once information stored in the magnetic stripe is extracted as a F-2F waveform by the magnetic stripe reader, peaks, valleys and mid-level transition points between every consecutive peak and valley are detected. A peak-to-peak period and an average time are directly derived to determine whether the corresponding peak-to-peak transition is associated with a binary bit of '1' or '0'. This magnetic stripe reader spares a need for a multi-bit analog-to-digital converter (ADC) and a large memory, and thus, constitutes a simple and self-contained solution that may read out the binary information stored on the magnetic stripe with reduced power consumption and improved cost efficiency.

Magnetic stripe reader

The invention relates to a secure device, and more particularly, to systems, devices and methods of reducing power consumption of the secure device by limiting the amount of secure volatile memory that needs to be supplied by a battery. In a transport power mode, a sensitive data originally stored in a volatile memory is backed up in an encrypted format to a non-volatile memory, such that none or only a small area of the secure volatile memory has to be retained and powered by the battery for preserving cryptographic keys that are used to backup and recover the sensitive data. This secure device is applied in high security applications such as secure financial terminals.

Method for lowering power consumption in secure devices

Embodiments of the present invention provide systems, devices and methods for efficiently calculating a true RMS values (either voltage or current) of an AC signal. The RMS value is generated from both high and low frequency components of the AC signal without a high speed ADC being integrated within the system. The high frequency component is processed by calculating an average current waveform of the high frequency component and approximating a corresponding RMS value using a waveform factor. The waveform factor is effectively a scalar that relates the average current waveform of the high frequency component to an appropriate RMS value.

Root mean square (RMS) metering devices and methods for generating RMS current level to both high or low frequency within signal

Various embodiments of the present invention relates to systems, devices and methods of detecting tampering and preventing unauthorized access by incorporating programmability and randomness into a process of coupling, driving and sensing conductive wires that are arranged above sensitive areas in a secured system. Such a tampering detection system comprises a security mesh network, a random number generator, a security controller and a security monitor. The security mesh network includes a plurality of security elements made from the conductive wires. The security controller selects a subset of security elements, forms a security array, and generates a driving stimulus. The security monitor selects a SENSE node, monitors an output at the SENSE node, and generates a flag signal indicating the presence of a tampering attempt. Programmability and randomness are introduced to at least one of the system parameters including array configuration, driving stimulus, SENSE node, and detection mode via random numbers.

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Frisco, TX, United States of America

Sung Ung Kwak