Samsung Display Co., Ltd.

Samsung Electronics Co., Ltd.

Sung-Ryul Kim

Hong-Kee Chin

Hwa-Yeul Oh

Yong-Mo Choi

O-Sung Seo

Ki-Hun Jeong

Sung-Hoon Yang

Kap-Soo Yoon

Dae-Cheol Kim

Jae-Ho Choi

Jong-in Kim

Byeong-Beom Kim

Jean-Ho Song

Je-Hyeong Park

Jae-Hyoung Youn

Yun-Jong Yeo

Woong-Kwon Kim

Jung-Suk Bang

Kun-Wook Han

Byeong-Hoon Cho

Dong-Gyu Kim

Yu-Gwang Jeong

Woo-Geun Lee

Shi-Yul Kim

Jong-Hyun Choung

Bong-Kyun Kim

Shin-Il Choi

Sun-Young Hong

Hyeong-Suk Yoo

Yang-Ho Bae

Hyung-jun Kim

Dong-Ju Yang

Sung-Haeng Cho

Byoung-June Kim

Ki-Yeup Lee

Czang-Ho Lee

Nam-Seok Suh

Ki-Won Kim

Young-Wook Lee

Sang Wook Lee

Ho-Jun Lee

Jae-Jin Song

Pil-Soon Hong

Hong-Sun Hwang

Young Goo Song

Seong-Hun Kim

Hee-Joon Kim

Woo-Sung Sohn

Younggoo Song

Ki-Won Park

Kyung-Suk Jung

Woong Kwon Kim

Seung Soo Baek

Nam-Heon Kim

Dae-Hee Jung

Sang Ho Kim

Jae Jin Song

Hea Chun Lee

Sung-Jin Mun

Yung-Jong Yeo

Jae-Hyoung Yoon

Dae Cheoul Kim

A display apparatus includes a display panel comprising a plurality of pixels, each of the pixels comprising a thin film transistor connected to a gate line and a data line and a display element connected to the thin film transistor, a driving voltage generator configured to generate a gate-on voltage and a plurality of gate-off voltages, a timing controller configured to divide an initial driving period into a plurality of setting periods and output a gate-off voltage corresponding to each of the setting periods, and a gate driver circuit configured to generate a gate signal using the gate-on voltage and the gate-off voltage corresponding to a setting period and output the gate signal to the gate line.

Display apparatus and method of driving the display apparatus

A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape.

Thin film transistor substrate and the method thereof

A touch display apparatus includes a base substrate, a light blocking semiconductor pattern disposed on the base substrate and configured to block a visible light and transmit an infrared light, a sensing element disposed on the light blocking semiconductor pattern and configured to detect a touch position using an incident infrared light, a driving element configured to drive the sensing element, a signal line electrically connected with the sensing element or the driving element, and a wiring connecting part disposed under the signal line and including a same material as the light blocking semiconductor pattern.

Electrostatic member in forming touch display apparatus and method of manufacturing the same

A display device includes an infrared sensing transistor and a visible sensing transistor. The visible sensing transistor includes a semiconductor on a substrate; an ohmic contact on the semiconductor; an etch stopping layer on the ohmic contact; a source electrode and a drain electrode on the etch stopping layer; a passivation layer on the source electrode and the drain electrode; and a gate electrode on the passivation layer. The etch stopping layer may be composed of the same material as the source electrode and the drain electrode. The infrared sensing transistor is similar to the visible sensing transistor except the etch stopping layer is absent.

Visible sensing transistor, display panel and manufacturing method thereof

A touch sensing substrate includes a substrate, a first light sensing element, a second light sensing element and a first bias line. The first light sensing element includes a first gate electrode, a first active pattern overlapping with the first gate electrode, a first source electrode partially overlapping with the first active pattern and a first drain electrode partially overlapping with the first active pattern. The second light sensing element includes a second gate electrode, a second active pattern overlapping with the second gate electrode, a second source electrode partially overlapping with the second active pattern and a second drain electrode partially overlapping with the second active pattern. The first bias line is connected to the first and second gate electrodes.

Touch sensing substrate and method of manufacturing the same

An optical sensor includes a visible light sensor includes a visible light sensing transistor and an infrared light sensor includes an infrared light sensing transistor, wherein the visible light sensing transistor receives a first driving voltage through a first driving voltage line, the infrared light sensing transistor receives a second driving voltage through a second driving voltage line, and the visible light sensing transistor and the infrared light sensing transistor receive a reference voltage through a reference voltage line.

Optical sensor

A thin film transistor array panel according to an exemplary embodiment of the present invention comprises a substrate, a gate line formed on the substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, and a data line formed on the semiconductor layer, wherein the data line comprises a lower data layer, an upper data layer, a data oxide layer, and a buffer layer, wherein the upper data layer and the buffer layer comprise a same material.

Thin film transistor substrate and manufacturing method thereof

A method of manufacturing a thin film transistor array substrate includes forming a gate pattern on a substrate, forming a gate insulating film on the substrate, forming a source/drain pattern and a semiconductor pattern on the substrate, forming first, second, and third passivation films successively on the substrate. Over the above multi-layered passivation film forming a first photoresist pattern including a first portion formed on part of the drain electrode and on the pixel region, and a second portion. The second portion is thicker than the first portion. Then, patterning the third passivation film using the first photoresist pattern, forming a second photoresist pattern by removing the first portion of the first photoresist pattern, forming a transparent electrode film on the substrate, removing the second photoresist pattern and the transparent electrode film disposed on the second photoresist pattern, and forming a transparent electrode pattern on the second passivation layer.

Thin film transistor array substrate for a display panel and a method for manufacturing a thin film transistor array substrate for a display panel

A thin-film transistor (TFT) substrate having reduced defects is fabricated using a reduced number of masks. The TFT substrate includes gate wiring formed on a substrate. The gate wiring includes a gate electrode. A semiconductor pattern is formed on the gate wiring. An etch-stop pattern is formed on the semiconductor pattern. Data wiring includes a source electrode which is formed on the semiconductor pattern and the etch-stop pattern. Each of the gate wiring and the data wiring includes a copper-containing layer and a buffer layer formed on or under the copper-containing layer.

Thin-film transistor substrate and method of fabricating the same

A method of manufacturing a thin film transistor capable of simplifying a substrate structure and a manufacturing process is disclosed. The method of manufacturing a thin film transistor array substrate comprising a three mask process. The 3 mask process comprising, forming a gate pattern on a substrate, forming a gate insulating film on the substrate, forming a source/drain pattern and a semiconductor pattern on the substrate, forming a first, second, and third passivation film successively on the substrate. Over the above multi-layers of the passivation film forming a first photoresist pattern comprising a first portion formed on part of the drain electrode and on the pixel region, and a second portion wherein, the second portion thicker than the first portion, and then patterning the third passivation film using the first photoresist pattern, forming a second photoresist pattern by removing the first portion of the first photoresist pattern, forming a transparent electrode film on the substrate, removing the second photoresist pattern and the transparent electrode film disposed on the second photoresist pattern; and forming a transparent electrode pattern on the second passivation layer.

A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cmto about 0.3 mole/cmof a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cmto about 0.3 mole/cmof 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.

Thin film transistor substrate, display device having the same and method of manufacturing the display device

Provided are a display substrate and a display device including the same. The display substrate includes: gate wiring; a first semiconductor pattern formed on the gate wiring and having a first energy bandgap; a second semiconductor pattern formed on the first semiconductor pattern and having a second energy bandgap which is greater than the first energy bandgap; data wiring formed on the first semiconductor pattern; and a pixel electrode electrically connected to the data wiring. Because the second energy bandgap is larger than the first energy bandgap, a quantum well is formed in the first semiconductor pattern, enhancing electron mobility therein.

Display substrate having quantum well for improved electron mobility and display device including the same

Growing community of inventors

Cheonan-si, South Korea

Sung-Ryul Kim