Samsung Electronics Co., Ltd.

Sung Ok Kim

Min Woo Kim

Jae Hyun Kim

Jae Kwon Lee

Chang Ho Cho

Dahm Yu

Kyu Sung Lee

Ho Gyung Kim

Dea Woo Ryu

Yong Gil Lee

Ae Yong Chung

A semiconductor package test apparatus is provided. A semiconductor package test apparatus comprises a test board including a plurality of sensors, a chamber into which the test board is loaded, and a controller configured to control a temperature of the chamber, wherein the controller adjusts the temperature using the plurality of sensors.

Semiconductor package test apparatus and method

A display apparatus is provided. The display apparatus includes a display panel, a substrate, and a bottom chassis. The substrate is provided with light sources to emit light towards the display panel. The substrate includes a fixing hole formed between the light sources. The substrate is coupled to the bottom chassis. The bottom chassis includes a fixing protrusion to be coupled to the fixing hole. The fixing protrusion is formed with the bottom chassis to have a detachment prevention structure so that the fixing protrusion is prevented from being detached from the fixing hole.

Display apparatus

A system and method automatically analyzes and manages loss factor data of test processes in which a great number of IC devices are tested as a lot with a number of testers. The lot contains a predetermined number of identical IC devices, and the lot test process is performed sequentially according to a predetermined number of test cycles. The system include a means for verifying test results for each of the test cycles and for determining whether or not a re-test is to be performed and an IC device loading/unloading means for loading IC devices to be tested and contained in the lot to a test head and for unloading the tested IC devices from the test head by sorting the tested IC devices according to the test results. The system also includes raw data generating means for generating raw data on the basis of time data occurring when the test process is performed; data calculating means for calculating testing time data, index time data based on the raw data, and loss time data; data storage means for storing the raw data and the calculated data; and data analyzing and outputting means for analyzing the raw data and the calculated data according to the lots, the plurality of testers and the IC device loading/unloading means and for outputting the analyzed output through an user interface. The test system includes testers, a server system and terminal computer, and the server system is provided with data storage means for integrally manipulating time data generated by the testers according to lots and test cycles and for storing manipulated time data.

System and method for automatically analyzing and managing loss factors in test process of semiconductor integrated circuit devices

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Cheonan, South Korea

Sung Ok Kim