Samsung Electronics Co., Ltd.

Sung-Min Sim

Young-hee Song

Se-Young Jeong

In-young Lee

Soon-Bum Kim

Young-Goan Jang

An interconnection structure includes an integrated circuit (IC) chip having internal circuitry and a terminal to electrically connect the internal circuitry to an external circuit, a passivation layer disposed on a top surface of the IC chip, the passivation layer configured to protect the internal circuitry and to expose the terminal, an input/output (I/O) pad, where the I/O pad includes a first portion in contact with the terminal and a second portion that extends over the passivation layer, and an electroless plating layer disposed on the I/O pad.

Interconnection structure of integrated circuit chip

There is provided a semiconductor device having a silicon oxynitride passivation layer and a fabrication method thereof. The passivation layer is formed of a silicon oxynitride having a dielectric constant of 5.0-6.0 and an atomic composition ratio of silicon (25-40%), oxygen (25-40%), and nitrogen (25-40%). Therefore, the passivation layer has a low dielectric constant and is highly moisture-resistant to thereby reduce the parasitic capacitance between metal wiring layers.

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Gyeonggi-do, South Korea

Sung-Min Sim