Samsung Electronics Co., Ltd.

Other

Industry-University Cooperation Foundation Hanyang University

Ajou University Industry-Academic Cooperation Foundation

Korea District Heating Corporation

Sung Min Kim

Dae Won Ha

Hyo Jin Kim

Jung Hyun Park

Cheol Jin Kim

Seong Hwan Kim

Do Y Choi

Young Jae Lee

Young Kwan Kim

Tae Joo Park

Bong Ok Kim

Jae Hoon Shim

Mun Hyeon Kim

Sun Hom Paak

Ji Hye Yu

Won Seok Chang

Duk Jin Jeon

Sang Woon Lee

Jung Woo Hong

Sang Ho Shin

Hye Ju Kim

Hae Jun Jung

Dong Woo Han

Kwang Keun Choi

Won Kwon Lee

Mi Young Kwak

No Gil Park

Deog Yong Ahn

Jeong Dong Noh

A semiconductor device includes a substrate with first and second regions separated from each other, a laminate structure including at least one sacrificial layer and at least one active layer alternately stacked on the substrate, a first isolation insulating layer on the laminate structure on the first region, a second isolation insulating layer on the laminate structure on the second region, the second isolation insulating layer having a same thickness as the first isolation insulating layer, a first upper active pattern spaced apart from the first isolation insulating layer, a first gate electrode surrounding at least a portion of the first upper active pattern, a second upper active pattern spaced apart from the second isolation insulating layer, and a second gate electrode surrounding at least a portion of the second upper active pattern, wherein top surfaces of the first and second isolation insulating layers are at different heights.

Semiconductor device and method for fabricating the same

Provided is a semiconductor device. The semiconductor device comprises a first active pattern extending in a first direction on a substrate, a second active pattern which extends in the first direction and is adjacent to the first active pattern in a second direction different from the first direction, a field insulating film placed between the first active pattern and the second active pattern, a first gate structure which crosses the first active pattern, extends in the second direction, and includes a first gate electrode and a first gate spacer, a second gate structure which crosses the second active pattern, extends in the second direction, and includes a second gate electrode and a second gate spacer, a gate separation structure placed on the field insulating film between the first gate structure and the second gate structure.

Semiconductor device and a method of manufacturing the semiconductor device

A semiconductor device includes an active fin extending in a first direction on a substrate, a gate electrode intersecting the active fin and extending in a second direction, source/drain regions disposed on the active fin on both sides of the gate electrode, and a contact plug disposed on the source/drain regions. The contact plug has at least one side extending in the second direction which has a step portion having a step shape.

FINFETS having step sided contact plugs and methods of manufacturing the same

A semiconductor device including: a lower semiconductor substrate; an upper semiconductor substrate overlapping the lower semiconductor substrate, the upper semiconductor substrate including a first surface and a second surface opposite to the first surface; an upper gate structure on the first surface of the upper semiconductor substrate; a first interlayer insulation film which covers the upper gate structure, wherein the first interlayer insulation film is between the lower semiconductor substrate and the upper semiconductor substrate; and an upper contact connected to the lower semiconductor substrate, wherein the upper contact is on a side surface of the upper gate structure, wherein the upper contact includes a first portion penetrating the upper semiconductor substrate, and a second portion having a side surface adjacent to the side surface of the upper gate structure, and a width of the first portion decreases toward the second surface.

Semiconductor device including an upper contact in contact with a side surface of an upper gate structure

A semiconductor device includes a base substrate, a first electrode plate on the base substrate, a first power rail on the first electrode plate, the first power rail extending in a first horizontal direction and overlapping the first electrode plate in a vertical direction, a second power rail on the first electrode plate, the second power rail extending in the first horizontal direction and overlapping the first electrode plate in the vertical direction, and the second power rail being spaced apart from the first power rail in a second horizontal direction different from the first horizontal direction, a first power rail contact electrically connecting the first electrode plate and the first power rail, an insulating layer on the base substrate to surround the first electrode plate, the first power rail, and the second power rail, and a gate electrode extending in the second horizontal direction on the insulating layer.

Semiconductor device

A device includes a lower semiconductor substrate, a lower gate structure on the lower semiconductor substrate, the lower gate structure comprises a lower gate electrode, a lower interlayer insulating film on the lower semiconductor substrate, an upper semiconductor substrate on the lower interlayer insulating film, an upper gate structure on the upper semiconductor substrate, and an upper interlayer insulating film on the lower interlayer insulating film, the upper interlayer insulating film covers sidewalls of the upper semiconductor substrate The upper gate structure comprises an upper gate electrode extending in a first direction and gate spacers along sidewalls of the upper gate electrode. The upper gate electrode comprises long sidewalls extending in the first direction and short sidewalls in a second direction The gate spacers are on the long sidewalls of the upper gate electrode and are not disposed on the short sidewalls of the upper gate electrode.

Semiconductor device and method of fabricating the same

Disclosed is a resistive switching element. The resistive switching element includes a first oxide layer and a second oxide layer stacked one on top of the other such that an interface is present therebetween, wherein the first oxide layer and the second oxide layer are made of different metal oxides; two-dimensional electron gas (2DEG) present in the interface between the first oxide layer and the second oxide layer and functioning as an inactive electrode; and an active electrode disposed on the second oxide layer, wherein when a positive bias is applied to the active electrode, an electric field is generated between the active electrode and the two-dimensional electron gas, such that the second oxide layer is subjected to the electric field, and active metal ions from the active electrode are injected into the second oxide layer. The resistive switching element realizes highly uniform resistive switching operation.

Resistive switching element and memory device including the same

A display apparatus including: a main body having an opening at the front part; a backlight unit configured to generate light; and an image forming unit provided in the front part of the main body, and configured to block or transmit the light generated by the backlight unit to create an image, where the image forming unit includes: a pair of transparent substrates disposed to be opposite to each other; a cable configured to transmit image data to the pair of transparent substrates; and a pair of polarizing films respectively disposed on the outer surfaces of the pair of transparent substrates, and wherein an edge part of at least one transparent substrate of the pair of transparent substrates protrudes to connect to the cable, and at least one polarizing film of the pair of polarizing films extends to the main body in a direction in which the at least one transparent substrate protrudes.

Display apparatus with main body supporting image forming unit

The present invention relates to a port installed in a closed-ended photochemical reactor, and more particularly, to a multi-functional port for microalgae cultivation and harvesting that supplies gas for cultivation for culturing microalgae by connecting to the closed-ended photochemical reactor; supplies gas for prevention of precipitation for lifting microalgae during cultivation; and assembles by taking samples of microalgae or selectively combining a plurality of valves which can harvest microalgae, whose cultivation is completed.

Multi-functional port for microalgae cultivation and harvesting

Provided is a method for fabricating an organic semiconductor transistor having an organic polymeric gate insulating layer. The method includes forming an organic gate insulating layer on a substrate by a vapor deposition method using organic monomer sources, and causing a polymerization reaction to occur in the organic gate insulating layer to complete an organic polymeric gate insulating layer. Since the vapor deposition method, which is a low-temperature dry-type technique, is employed, the organic polymeric gate insulating layer can be uniformly formed on a large-area substrate by a simplified in-situ process.

Fabrication method for organic semiconductor transistor having organic polymeric gate insulating layer

Growing community of inventors

Incheon, South Korea

Sung Min Kim