Samsung Electronics Co., Ltd.

Lg Electronics Inc.

S-printing Solution Co., Ltd.

Hewlett-packard Development Company, L.p.

Sung-kyu Choi

Jung-Hyun Lee

Chung-woo Kim

Woo-sung Shim

Kyu-sik Kim

Min-Kyu Park

Sang-Moo Choi

Sang-Hun Jeon

Sang-hun Jeon

Sung-Ho Park

Dong-joon Ma

Jeong-Hee Han

Seong-hun Jeong

Hyun-Sang Hwang

Goan-Soo Seong

In-cheol Park

Young-jun Song

Woo-ram Ann

Jong-Keun Cho

Bong-hoon Park

Jin-bong Lee

Jung-wook Suh

Gyeong-cheol Jang

Chang-su Ma

Jong-myung Heo

Ji-hye Song

Seok-yung Lee

Sun-tae Kim

Sang-beom Jo

Jong-Myung Heo

An image forming apparatus includes a fuser configured to fuse printing paper where a toner has been developed; and a fuser driver configured to provide power being provided from an external AC to a heating element inside the fuser so that the fuser has a predetermined temperature, wherein, in response to an operational state of the image forming apparatus being at a waiting state, the fuser driver performs a phase control on the power being provided to the heating element using AC power of sections other than a phase angle of a range predetermined based on a peak voltage value of the external AC power.

Image forming apparatus with fuser driver and method for controlling thereof

A graphics processing apparatus and a graphics processing method are provided. The graphics processing method processes applications using a plurality of GPUs includes rendering a plurality of video data constituting at least one application using the plurality of GPUs, blending the plurality of video data that are rendered by the plurality of GPUs, and outputting blended images, wherein the blending performs blending through at least one of the GPUs that does not perform a rendering job and a video processing constituent element which is different from the plurality of GPUs.

Graphics processing apparatus and graphics processing method

An image forming apparatus includes an image forming unit, a power supply configured to receive and convert an alternating current (AC) voltage into at least one direct current (DC) voltage, and output the same, a DC-DC converter configured to convert the at least one DC voltage into a driving voltage at a predetermined level, and a controller configured to be activated by the driving voltage, and control the power supply to turn on the image forming unit by supplying a first DC voltage to the image forming unit, and after the image forming unit has been turned on, supplying a second DC voltage at a higher level than a level of the first DC voltage to the image forming unit.

Image forming apparatus and method of supplying power thereof

A display method of a display apparatus is provided. The display method includes displaying an image on a screen, detecting a touch manipulation with respect to the image, and if the touch manipulation is detected, changing a display status of the image according to a physical attribute of the touch manipulation.

Display apparatus and method thereof

The present general inventive concept describes a switching mode power supply (SMPS) and a method of supplying power by using the same. An SMPS that may be used in an image forming apparatus can include a transformation unit to transform an alternating-current (AC) voltage input to the SMPS, into at least one direct-current (DC) voltage by using a transformer, a first output voltage output unit to output the transformed DC voltage as a first output voltage of the SMPS, a first switching unit to prevent output of the second output voltage, and a second switching unit to prevent output of the second output voltage.

Switching mode power supply of image forming apparatus and method of supplying power according to state of image forming apparatus by using the same

A nonvolatile memory device using a resistance material and a method of fabricating the same are provided. The nonvolatile memory device includes a switching element, and a data storage part electrically connected to the switching element. In the data storage part, a lower electrode is connected to the switching element, and an insulating layer is formed on the lower electrode to a predetermined thickness. The insulating layer has a contact hole exposing the lower electrode. A data storage layer is filled in the contact hole and the data storage layer is formed of transition metal oxide. An upper electrode is formed on the insulating layer and the data storage layer.

Nonvolatile memory device made of resistance material and method of fabricating the same

An apparatus and method for connecting a processor to buses. The apparatus includes a multiplexer which, when addressing information indicating the address of a first memory connected to a synchronous data bus synchronized with a processor, from the processor is received, receives first data from the processor and transfers the received first data to the first memory through the synchronous data bus, or receives second data from the first memory through the synchronous data bus and transfers the received second data to the processor, and if address information indicating the address of a second memory connected to an asynchronous data bus not synchronized with the processor, from the processor is received, receives third data from the processor and transfers the third data to a buffer, or receives fourth data from the buffer and transfers the fourth data to the processor.

Apparatus and method for connecting processor to bus

A memory mapping method is provided for writing block data composed of a plurality of lines in first and second memories, each memory including at least two banks of the same number. The method maps the memories such that continuous even-numbered lines are written in different banks of different memories, and continuous odd-numbered lines are written in different banks of different memories when the block data is motion-compensated in a frame mode or a field mode. Accordingly, bank interleaving can be carried out in the respective memories and two memory channels can be simultaneously used to improve bus utilization efficiency and memory channel utilization efficiency.

Method and apparatus for mapping memory

A semiconductor memory device a first dopant area and a second dopant area, the first dopant area and the second dopant area disposed in a semiconductor substrate, an insulating layer disposed in contact with the first dopant area and the second dopant area, the insulating layer including a material selected from the group consisting of Hf, Zr, Y, and Ln, and a gate electrode layer disposed on the insulating layer.

Semiconductor device including high-k insulating layer and method of manufacturing the same

A data transmission method of a GPRS includes estimating a possibility of an impending stall state of a transmit window, transmitting a stall state alarm signal of the transmit window to a network if it is predicted that the stall state of the transmit window is approaching, and controlling data transmissions according to whether an ACK signal for the stall state alarm signal is received or not from the network. Notification of the possibility of the stall state of the transmit window is provided at least once and preferably twice to the network before stall actually occurs, thereby reducing the number of occurrences of the transmit window's stall state. As a result, waste of network resources due to re-transmission performed in the stall state is minimized.

Data transmission control method for GPRS

A multi-display system and a method thereof which solves an overloading problem on a memory bus. The multi-display system includes displays which independently display separate images, a main memory which stores input image signals, image signal process units which are disposed corresponding to the displays and process the image signals according to the corresponding displays, a secondary memory which stores the image signals processed by the image signal process units, and a controller which controls the image signal process units to display the image signals stored in the main memory on each of the corresponding displays. The controller controls the image signal process units to display the image signals stored in the secondary memory on some of the displays in response to overloading of the image signals on the memory bus, through which the image signals are retrieved from, where the image signals are displayed on more than two displays. Accordingly, the multi-display system can prevent the overloading of the image signals on the memory bus and has improved processing capabilities.

Multi-display system and method thereof

An apparatus which processes a digital image and a method therefor which can reduce an error when calculating an output value obtained by interpolating pixel values of the input digital image. The apparatus includes an interpolation processing unit which interpolates an input digital image, and a controller which measures an interpolation interval of pixel values of the digital image, calculates a coefficient by substituting the interpolation interval for a coefficient equation stored in a register, and calculates an interpolation node for the digital image by substituting the coefficient and an output pixel position value of the digital image for an interpolation node calculation equation. The controller controls the interpolation processing unit so as to interpolate the digital image to the interpolation node. As a result, it is possible to reduce an error between an interpolated output pixel position value and an output pixel position value for the pixel values of the input digital image.

Apparatus for processing digital image and method therefor

A SONOS type memory includes a semiconductor substrate, first and second impurity regions in the semiconductor substrate doped with impurity ions of a predetermined conductivity, separated a predetermined distance from each other, a channel region between the first and second impurity regions, and a data storage type stack on the semiconductor substrate between the first and second impurity regions. The data storage type stack includes a tunneling oxide layer, a memory node layer for storing data, a blocking oxide layer, and an electrode layer, which are sequentially formed. A dielectric constant of the memory node layer is higher than dielectric constants of the tunneling and the blocking oxide layers, and a band offset of the memory node layer is lower than band offsets of the tunneling and the blocking oxide layers. The tunneling oxide layer and the blocking oxide layer are high dielectric insulating layers.

SONOS type memory device

Provided are a method and apparatus for accelerating graphic data which can reduce the computational complexity of graphic processing data. The method of accelerating two-dimensional graphic data includes: receiving information regarding the width of a graphic window to be processed; reading pixel data from a memory in which pixel data in the graphic window is stored; receiving information regarding two pixel data regions which are divided from the memory area based on the width information of the graphic window, one pixel data region to be processed using a burst mode and the other pixel data region to be processed in units of bytes; and individually performing predetermined graphic processing on the divided pixel data regions.

Growing community of inventors

Gyeonggi-do, South Korea

Sung-kyu Choi