Hynix Semiconductor Inc.

Skhynix Inc.

Hyundai Electronics Industries Co. Ltd.

Sung-Kwon Lee

Min-Suk Lee

Sang-Ik Kim

Jun-Hyeub Sun

Tae-Woo Jung

Sang-Oh Lee

Myung-Ok Kim

Chang-Youn Hwang

Weon-Joon Suh

Jin-Ki Jung

Sung-Yoon Cho

Kwang-Ok Kim

Dong-Sauk Kim

Kuk-Han Yoon

Seung-Chan Moon

Dong-Duk Lee

Jin-Woong Kim

Young-Kyun Jung

Yun-Seok Cho

Won-Kyu Kim

Hyung-Soon Park

Hyeok Kang

Myung-Kyu Ahn

Il-Young Kwon

Jae-Young Kim

Jae-Young Lee

Jong-Sik Bang

Ho-Seok Lee

Phil-Goo Kong

Jin-Sung Oh

Min-Seok Lee

Ho-Jin Jung

Gyu-Dong Park

Chun-Hee Lee

Gyu-Han Yoon

Sea-Ug Jang

A method for fabricating a semiconductor device includes forming a plurality of first hard mask patterns separated by a plurality of trenches on a target layer, forming a plurality of second hard mask patterns filling the plurality of trenches, forming a plurality of first opening units in the plurality of second hard mask patterns, forming a plurality of second opening units in the plurality of first hard mask patterns and forming a plurality of patterns using the plurality of first opening units and the plurality of second opening units, which are transferred by etching the target layer.

Semiconductor device having hard mask structure and fine pattern and forming method thereof

A method for fabricating a semiconductor device includes forming an etching target layer over a substrate including a first region and a second region; forming a hard mask layer over the etching target layer; forming a first etch mask over the hard mask layer, wherein the first etch mask includes a plurality of line patterns and a sacrificial spacer layer formed over the line patterns; forming a second etch mask over the first etch mask, wherein the second etch mask includes a mesh type pattern and a blocking pattern covering the second region; removing the sacrificial spacer layer; forming hard mask layer patterns having a plurality of holes by etching the hard mask layer using the second etch mask and the first etch mask; and forming a plurality of hole patterns in the first region by etching the etching target layer using the hard mask layer patterns.

Mask pattern for hole patterning and method for fabricating semiconductor device using the same

A semiconductor device includes a semiconductor substrate having an etch target layer provided on the surface thereof, and a hard mask layer formed over the etch target layer and including silicon, wherein the hard mask layer includes a dual structure including a first area and a second area having a larger etch rate than the first area, in order to increase an etching selectivity of the hard mask layer.

Semiconductor device with silicon-containing hard mask and method for fabricating the same

A method is used in forming a fine pattern in a semiconductor device. The method includes forming an etch target layer; forming a photoresist pattern over the etch target layer; forming a polymer pattern including silicon-oxygen (Si&#x2014;O) bonds on sidewalls of the photoresist pattern; removing the photoresist pattern; and etching the etch target layer using the polymer pattern as an etch mask.

Method for forming fine pattern in semiconductor device

A method for forming contact holes in a semiconductor device includes forming a hard mask layer over an etch target layer, forming a first line pattern in the hard mask layer by etching a portion of the hard mask layer through a primary etch process, forming a second line pattern crossing the first line pattern by etching the hard mask layer including the first line pattern through a secondary etch process, and etching the etch target layer by using the hard mask layer including the first line pattern and the second line pattern as an etch barrier.

Method for forming contact holes in semiconductor device

A method for forming a capacitor in a semiconductor device comprises forming an inter-layer layer on a semi-finished substrate; etching the inter-layer insulation layer to form a plurality of first contact holes; forming a first insulation layer on sidewalls of the first contact holes; forming a plurality of storage-node contact plugs filled into the first contact holes; forming a second insulation layer with a different etch rate from the first insulation layer over the storage-node contact plugs; forming a third insulation layer on the second insulation layer; sequentially etching the third insulation layer and the second insulation layer to form a plurality of second contact holes exposing the storage-node contact plugs; and forming the storage node on each of the second contact holes.

Method for forming storage node of capacitor in semiconductor device

A method for fabricating a three dimensional type capacitor is provided. The method includes forming a first insulation layer including first contact layers over a substrate, forming a second insulation layer over the first insulation layer, forming second contact layers by using a material having an etch selectivity different from the first contact layers such that the second contact layers are connected with the first contact layers within the second insulation layer, forming an etch stop layer over the second insulation layer and the second contact layers, forming a third insulation layer over the etch stop layer, etching the third insulation layer and the etch stop layer to form first contact holes exposing the second contact layers, etching the exposed second contact layers to form second contact holes exposing the first contact holes, and forming bottom electrodes over the inner surface of the second contact holes.

Semiconductor device and method for fabricating the same

A method for fabricating a semiconductor device includes forming a first pattern over a substrate, forming an oxide-based layer over the first pattern, forming a hard mask layer over the oxide-based layer, etching the hard mask layer at a first substrate temperature, and etching the oxide-based layer to form a second pattern, wherein the oxide-based layer is etched at a second substrate temperature which is greater than the first substrate temperature using a gas including fluorine (F) and carbon (C) as a main etch gas.

Method for fabricating semiconductor device

A first insulation layer is formed on a substrate structure including an inter-layer insulation layer and a storage node contact plug. The first insulation layer is etched to form a first opening exposing a portion of the storage node contact plug. The first opening is filled with an organic polymer layer. An etch stop layer and a second insulation layer are formed on the organic polymer layer and the first insulation layer. A photoresist pattern is formed on the second insulation layer. The second insulation layer and the etch stop layer are etched to form a second opening exposing a portion of the organic polymer layer. The photoresist pattern and the organic polymer layer are removed, thereby extending a portion of the second opening. A storage node is formed over the extended second opening and the second insulation layer.

Method for fabricating capacitor in semiconductor device

A semiconductor memory device capable of preventing bridge formations in a peripheral circuit region includes: a cell region; a peripheral circuit region adjacent to the cell region; and a plurality of line patterns formed in the cell region and the peripheral circuit region, wherein a spacing distance between the line patterns is at least onefold greater than a width of the line pattern.

Semiconductor memory device

A method for fabricating a fine pattern in a semiconductor device includes forming a first polymer layer and a second polymer layer over an etch target layer. The second polymer layer is patterned at a first substrate temperature. The first polymer layer is etched at a second substrate temperature using an etch gas that does not include oxygen (O). The first polymer layer is etched using the patterned second polymer layer as an etch mask. The etch target layer is then etched using the etched first polymer layer and the etched second polymer layer as an etch mask.

Method for fabricating a fine pattern in a semiconductor device

A method for forming a contact hole of a semiconductor is provided. Conductive patterns are formed over a substrate. An insulation layer is formed over the substrate to bury the conductive patterns. A hard mask including an amorphous carbon layer and an oxide based layer are formed in sequential order over the insulation layer and the conductive pattern. The amorphous carbon layer and the oxide layer are selectively etched to form a mask pattern. The insulation layer is etched using the mask pattern as a mask to form a contact hole.

Method for forming contact hole of semiconductor device

A method for forming a contact hole of a semiconductor device includes: forming a lower pattern over a substrate; forming a spin-on-glass (SOG) layer over the lower pattern; performing a first curing process on the SOG layer; forming an opening exposing a portion of the SOG layer; performing a second curing process on the SOG layer corresponding to a lower portion of the opening; and forming a contact hole exposing the lower pattern.

Method for fabricating contact hole of semiconductor device

A method for fabricating a semiconductor device is provided. The method includes: preparing a substrate defined as active regions and inactive regions and provided with a plurality of conductive patterns; forming a buffer layer over the plurality of conductive patterns; forming an organic material having fluidity better than that of a photoresist layer on the buffer layer; flowing the organic material between the conductive patterns through a thermal treatment process, thereby filling a portion of each gap between the conductive patterns; forming the photoresist layer over the organic material and the buffer layer; forming a plurality of photoresist patterns opening the active regions through a photo-exposure process and a developing process; and performing an ion-implantation process using the plurality of photoresist patterns, thereby forming a plurality of junction regions in the active regions of the substrate.

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Ichon-shi, South Korea

Sung-Kwon Lee