Cypress Semiconductor Corporation

Integrated Device Technology, Inc.

Suvolta, Inc.

Dsm Solutions, Inc.

Sung-Ki Min

Khaldoon S Abugharbieh

Gary Giust

Chwei-po Chew

A transistor includes a channel region with a first portion and a second portion. A length of the first portion is smaller than a length of the second portion. The first portion has a higher threshold voltage than the second portion. The lower threshold voltage of the second portion allows for an increased ON current. Despite the increase attained in the ON current, the higher threshold voltage of the first portion maintains or lowers a relatively low OFF current for the transistor.

Transistor providing different threshold voltages and method of fabrication thereof

A lock-aid circuit and method is applied to a phase lock loop (PLL) having a voltage controlled oscillator (VCO), wherein the lock aid is coupled with the input of the VCO. In one example, the lock aid includes a Schmitt trigger having an output, a switch having an output and an input coupled to the output of the Schmitt trigger, and a voltage controlled current source coupled with the output of the switch.

Circuit and method to speed up PLL lock-time and prohibit frequency runaway

A circuit and method configured to generate a variable impedance. The circuit may comprise a voltage controlled resistor configured to generate the variable impedance in response to (i) a first transistor configured to receive a first control signal and (ii) a bias transistor configured to receive a bias signal. In one example, the variable impedance may be generated in further response to a clamp transistor.

Circuit and method for controlling an output of a ring oscillator

A circuit comprising an oscillator configured to generate a periodic signal in response to (i) control signal and (ii) a current. The current may be varied independently of the control signal. In one example, the oscillator may generate the periodic signal in further response to a second current that may vary in response to the control signal. In another example, the oscillator may be used in a phase-locked loop circuit.

Method, circuit and/or architecture to improve the frequency range of a voltage controlled oscillator

A current source varies the bias current to a differential amplifier according to fluctuations in the supply voltage. In this manner, the operating point of the differential amplifier is automatically adjusted to compensate for variations in the supply voltage. Adjusting bias current in this manner provides for a reduction in power dissipation. The current supply is coupled to the differential amplifier in such a manner that a current mirror is not required to be connected between the differential amplifier and the inverter. Eliminating the need for such a current mirror is advantageous in reducing the number of gate delays and thereby increasing the speed of a level translator to which the current source is coupled.

Current source responsive to supply voltage variations

A high speed level translator is disclosed in which an ECL differential input signal is applied to a differential input amplifier, amplified, and converted to a single ended intermediate signal. An inverter circuit receives the intermediate signal and outputs a signal indicative of the polarity of the ECL differential input signal. The differential amplifier is biased with a current source which varies the bias current according to fluctuations in the supply voltage such that the operating point of the differential amplifier is automatically adjusted to compensate for variations in the supply voltage. Adjusting the bias current in such a manner allows for a reduction in power dissipation over conventional level translators. Further, since the differential amplifier is configured to provide a single ended intermediate signal, a current mirror is not required to be connected between the differential amplifier and the inverter. Eliminating the need for such a current mirror is advantageous in reducing the number of gate delays and thereby increasing the speed of the level translator.

Growing community of inventors

Cupertino, CA, United States of America

Sung-Ki Min