Skhynix Inc.

Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Sung-Joon Yoon

Jung-Hwan Moon

Jeong-Myeong Kim

June-Seo Kim

Tadashi Kai

Hyung-Dong Lee

Chun-Yeol You

Guk-Cheon Kim

Jong-Koo Lim

Seung-Mo Noh

Chi-Ho Kim

The disclosed technology includes an electronic device. The electronic device includes a semiconductor memory, and the semiconductor memory includes a variable resistance element that exhibits different resistance states for storing different data and is structured to include a planar shape including two curved potions of different curvatures.

Electronic device and method for fabricating the same

This technology provides an electronic device. An electronic device in accordance with an implementation of this document may include a semiconductor memory, and the semiconductor memory may include a free layer including a plurality of magnetic layers each having a variable magnetization direction; a tunnel barrier layer formed over the free layer; and a pinned layer formed over the tunnel barrier layer and having a pinned magnetization direction; wherein the plurality of magnetic layers in the free layer includes a first magnetic layer in contact with the tunnel barrier layer and a second magnetic layer not in contact with the tunnel barrier layer and a sum of an exchange field between the first magnetic layer and the second magnetic layer and a stray field generated by the first magnetic layer is larger than or the same as a difference between a uniaxial anisotropy field of the second magnetic layer and a demagnetizing field due to a shape of the second magnetic layer.

Electronic device

There is disclosed an electronic device comprising a semiconductor memory unit capable of reducing the switching current of a variable resistance element that switches between different resistance states. In an implementation, an electronic device includes a semiconductor memory unit that includes a variable resistance element comprising a first magnetic layer configured to have a magnetization direction pinned, a second magnetic layer configured to have a magnetization direction not pinned, and a non-magnetic layer interposed between the first magnetic layer and the second magnetic layer, wherein the variable resistance element comprises plane shapes having a plurality of edges, and the number of angled edges is larger than the number of rounded edges as a damping constant of the second magnetic layer increase.

This technology provides an electronic device. An electronic device in accordance with an implementation of this document may include a semiconductor memory, and the semiconductor memory may include free layer having a variable magnetization direction; a tunnel barrier layer formed over the free layer; a pinned layer formed over the tunnel barrier layer and having a pinned magnetization direction; an exchange coupling layer formed over the pinned layer; and a magnetic correction layer formed over the exchange coupling layer, wherein the magnetic correction layer comprises a first magnetic layer, a spacer layer and a second magnetic layer that are sequentially stacked, and the first magnetic layer has a saturation magnetization smaller than a saturation magnetization of the second magnetic layer.

Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: a pinned layer having a pinned magnetization direction; a free layer having a changeable magnetization direction; a tunnel barrier layer interposed between the pinned layer and the free layer, and including a metal oxide; and a carbon-based compound patch positioned at one or more of between the pinned layer and the tunnel barrier layer, between the free layer and the tunnel barrier layer, and in the tunnel barrier layer.

This patent document provides an electronic device capable of improving the characteristics of a variable resistance element. An electronic device in accordance with an implementation of this document includes semiconductor memory, and the semiconductor memory includes a variable resistance element capable of being included in the semiconductor memory, and including a fixed layer, a tunnel barrier layer, and a variable layer laminated therein, wherein the variable resistance element is capable of allowing a slope of a graph of a switching current density as a function of an external magnetic field to be proportional to the square of 'H/Hk' when the magnetization directions of the fixed layer and the variable layer are switched from a parallel state to an antiparallel state. In accordance with the electronic device of this patent document, the characteristics of the variable resistance element can be improved.

An electronic device includes a first magnetic layer pinned in its magnetization direction, a third magnetic layer pinned in its magnetization direction, a second magnetic layer interposed between the first magnetic layer and the third magnetic layer, and changeable in its magnetization direction, a barrier layer interposed between the first magnetic layer and the second magnetic layer, and a dielectric layer interposed between the second magnetic layer and the third magnetic layer, wherein the first magnetic layer has a width 1.5 to 5 times wider than a width of the second magnetic layer.

An electronic device includes a first electrode, a second electrode spaced apart from the first electrode, a resistance variable element interposed between the first electrode and the second electrode, and a conductor arranged at least one of a first side and a second side of the resistance variable element to apply an electric field to the resistance variable element while being spaced apart from the resistance variable element, the first side facing the second side.

Electronic device having resistance element

An electronic device is provided to include a semiconductor memory including a variable resistance element. The variable resistance element may include a variable resistance pattern including a first electrode layer, a variable resistance layer, and a second electrode layer that are sequentially stacked; and a switching assist structure spaced from a side wall of the variable resistance pattern to surround the variable resistance pattern and including multilayered conductive structures that are vertically spaced from one another.

A resistive memory device includes: a resistive layer which includes a first magnetic layer, a second magnetic layer, and a tunnel insulating layer interposed between the first magnetic layer and the second magnetic layer, and is switched between different resistance states; and a strained film formed over a sidewall of the resistive layer and applying a strain to the resistive layer, wherein the strained film includes a semiconductor material containing ions implanted therein

Resistive memory device

A resistive memory device includes: a memory cell comprising first and second electrodes and a resistive layer formed therebetween, wherein the resistive layer is formed of a resistance change material; and a strained film formed adjacent to the resistive layer and configured to apply a strain to the resistive layer.

Growing community of inventors

Icheon-si, South Korea

Sung-Joon Yoon