Samsung Electronics Co., Ltd.

Sung-joo Park

Young Nam Yun

Kyoung-Sun Kim

Jea-Eun Lee

Young-ho Lee

Jung-Joon Lee

Soo-Kyung Kim

Ki-Hyun Ko

Jae-jun Lee

Yong-jin Kim

Jong-Hoon Kim

Young-Man Ahn

Yang-Ki Kim

Young-Jun Park

Kwang-Seop Kim

Wang-Soo Kim

Chil-Nam Yoon

Yoo-Jeong Kwon

Si-Hoon Ryu

A memory device including: a loopback circuit for performing a loopback operation, wherein the loopback operation includes receiving, via a loopback channel, test signals provided from a test device and feeding back the test signals to the test device via the loopback channel; and an information management circuit for outputting information of the memory device to the loopback channel.

Method and system for monitoring information of a memory module in real time

A memory module includes semiconductor memory devices mounted on a circuit board and a control device mounted on the circuit board. The control device receives a command, an address, and a clock signal from an external device, and provides the command, the address, and the clock signal to the semiconductor memory devices. The control device, in a hidden training mode during a normal operation, performs a command/address training on at least one semiconductor memory device of the semiconductor memory devices by transmitting a first command/address and a first clock signal to the at least one semiconductor memory device and receiving a second command/address and a second clock signal in response to the first command/address and the first clock signal, from the at least one semiconductor memory device.

Memory modules, memory systems, and methods of operating memory modules

A data receiver includes a first buffer circuit and a second buffer circuit. The first buffer circuit varies a resistance of a data path and a resistance of a reference voltage path based on a plurality of control signals, and adjusts a voltage level of an input data signal and a level of a reference voltage to generate an internal data signal and an internal reference voltage based on the varied resistance of the data path and the varied resistance of the reference voltage path. The second buffer circuit compares the internal data signal with the internal reference voltage to generate a data signal.

Data receiver, semiconductor device and memory device including the same

A structure of an integrated circuit module includes a wiring board, a plurality of integrated circuits and at least one terminating resistance circuit. The wiring board has a mounting region on at least one surface thereof. The plurality of integrated circuits are mounted in the mounting region of the wiring board and spaced from one another in a first direction. The at least one terminating resistance circuit is arranged between at least two adjacent integrated circuits, and coupled to an output of a last of the plurality of integrated circuits.

Mounting structures for integrated circuit modules

The invention provides a thermal-emitting memory module, a thermal-emitting module socket, and a computer system comprising the thermal-emitting memory module and the thermal-emitting module socket. An embodiment of the thermal-emitting module includes: a module substrate having electrically-conductive traces; and a semiconductor device disposed on the module substrate and coupled to the electrically-conductive traces, the module substrate including a thermal-emitting portion disposed in proximity of the semiconductor device without directly contacting the semiconductor device.

Thermal-emitting memory module, thermal-emitting module socket, and computer system

A memory module, includes a memory module board and a plurality of memory devices on the memory module board. The memory module board includes one or more first input terminals configured to receive first signals to individually control the memory devices, and one or more second input terminals configured to receive second signals to commonly control the memory devices. Each of the memory devices includes a plurality of first signal input units configured to receive the first signals through one or more first input pins, a plurality of second signal input units configured to receive the second signals through one or more second input pins, and a plurality of dummy units, the dummy units being respectively connected to the first signal input units in parallel, and being configured to receive the first signals through one or more third input pins and to compensate for a signal line load.

Memory module

A method of forming an integrated circuit module may include interposing an auxiliary PCB between at least one semiconductor chip and a main PCB, the auxiliary PCB having at least one circuit pattern for electrical connection to one of the semiconductor chip and at least one circuit pattern formed on the main PCB.

Integrated circuit module and method of forming the same

A memory module includes a first memory group including a plurality of memory devices, a second memory group including a less number of memory devices with respect to the memory devices in the first memory group, a register configured to provide a command/address signal to the first memory group and a delayed command/address signal to the second memory group, a first signal line configured to transfer the command/address signal to the first memory group, and a second signal line configured to transfer the delayed command/address signal to the second memory group.

Memory module and register with minimized routing path

A memory module socket disposed on a principal surface of a mainboard, and adapted to mechanically receive and electrically connect a memory module with a mainboard, the memory module socket including a first unit socket having a plurality of first socket pins adapted to electrically connect a first connector disposed on an edge of the memory module, and a second unit socket having a plurality of second socket pins adapted to electrically connect to a second connector disposed on the memory module orthogonal to the first connector, wherein the memory module as installed in the memory module socket is parallel to the principal surface of the mainboard.

Growing community of inventors

Anyang-si, South Korea

Sung-joo Park