Samsung Display Co., Ltd.

Samsung Electronics Co., Ltd.

Sung Jae Moon

Kang Moon Jo

Dong Woo Kim

Jun Hyun Park

An Su Lee

Hwan Hee Jeong

Won Kyu Kwak

Dong Gyu Kim

Seong Young Lee

Sahng Ik Jun

Ki Cheol Kim

Woong-Sik Choi

Chae Woo Chung

Dong-Gyu Kim

Sang-Soo Kim

Hui-Won Yang

Tak-Young Lee

Jong Hwa Kim

Yang Hwa Choi

Jee Hoon Kim

Tak-young Lee

Jong Moo Huh

Woong Sik Choi

Yong Duck Son

Jae Seol Cho

A display device including: a substrate including a display area and a non-display area; a light-emitting element disposed in the display area; an encapsulation layer covering the light-emitting element; a driving unit disposed in the non-display area; a dam surrounding the display area and overlapping the driving unit, and a shielding layer overlapping the driving unit.

Display device

An organic light emitting diode display includes a clock wiring circuit including a first signal line and a second signal line, a resistance adjusting circuit including a first lower resistance line and a first upper resistance line connected to the first signal line and a second lower resistance line and a second upper resistance line connected to the second signal line, and a gate driving circuit connected to the resistance adjusting circuit. The second signal line is disposed closer to the gate driving circuit than the first signal line, the first lower resistance line and the second lower resistance line have higher resistivity than the first upper resistance line and the second upper resistance line, respectively, the first lower resistance line is shorter than the second lower resistance line, and the first upper resistance line is longer than the second upper resistance line.

Organic light emitting diode display

The present disclosure relates to a display device, and the display device according to an exemplary embodiment of the present inventive concept includes: a first pixel circuit portion including at least one transistor; a second pixel circuit portion including at least one transistor; a first pixel electrode electrically connected to the first pixel circuit portion; a second pixel electrode electrically connected to the second pixel circuit portion; a first data line electrically connected to the first pixel circuit portion; and a second data line electrically connected to the second pixel circuit portion, wherein the first data line and the second data line are arranged adjacent to each other along a first direction, and the second pixel electrode overlaps the first data line and the second data line in a plan view.

Display device with reduced parasitic capacitances between pixel electrodes and data lines

A touch sensor includes a base layer including a first to third sensing region and a non-sensing region surrounding the first to third sensing region; a plurality of touch electrode rows provided in the first to third sensing regions and including a plurality of first touch electrodes connected in a first direction; and a plurality of touch electrode columns including a plurality of second touch electrodes connected in a second direction crossing the first direction. At least one of the first to third sensing regions has an area larger than that of other sensing regions. The non-sensing region includes an additional non-sensing region disposed between the second sensing region and the third sensing region and a bridge line provided in the additional non-sensing region and electrically connecting the first touch electrodes of the second sensing region to the first touch electrodes of the third sensing region.

Touch sensor and display device including the same

A display device including: a substrate; an active layer disposed on the substrate and including active patterns; a first conductive layer disposed on the active layer; a second conductive layer disposed on the first conductive layer and including a data line; a third conductive layer disposed on the second conductive layer; and a light-emitting element disposed on the third conductive layer, wherein the first conductive layer includes a scan line, a first voltage line, and a second voltage line, the third conductive layer includes a third voltage line connected to the first voltage line and a fourth voltage line connected to the second voltage line, the first voltage line and the second voltage line extend in a first direction, the third voltage line and the fourth voltage line extend in a second direction, and the third voltage line and the fourth voltage line are alternately arranged in the first direction.

A display device includes a first conductive layer, a first insulation layer disposed on the first conductive layer, and active patterns disposed on the first insulation layer. The display device further includes a second conductive layer disposed on the active patterns and including a first gate electrode that overlaps a channel region of the active patterns and a driving gate electrode, a second insulation layer disposed on the second conductive layer, a third conductive layer including a capacitor electrode and at least one scan line disposed on the second insulation layer, a third insulation layer disposed on the third conductive layer, and an electrode layer including a first electrode disposed on the third insulation layer. The first electrode is connected to the capacitor electrode, the capacitor electrode overlaps the driving gate electrode, and the capacitor electrode and the driving gate electrode form a capacitor.

A display device including: a substrate; first, second, and third data lines extending in a first direction on the substrate and disposed to be adjacent along a second direction crossing the first direction; a semiconductor layer disposed on the first, second, and third data lines; a first insulating layer disposed on the semiconductor layer; first, second, and third lower storage electrodes disposed on the first insulating layer and arranged to be adjacent along the first direction; a second insulating layer disposed on the first, second, and third lower storage electrodes; a first scan line extending in the second direction on the second insulating layer; a first pixel connected to the first scan line and the first data line; a second pixel connected to the first scan line and the second data line; and a third pixel connected to the first scan line and the third data line.

An organic light emitting diode display including: a data wiring that includes a main data line disposed in a display area and a first data line disposed in a peripheral area; a driving voltage wiring that includes a main driving voltage line disposed in the display area and a first driving voltage line that is connected with the main driving voltage line and disposed in the peripheral area while extending in a first direction; and a driving low-voltage wiring that includes a cathode extending to the peripheral area while overlapping the display area, and a plurality of first driving low-voltage connection portions that are connected with the cathode and disposed in the peripheral area, wherein each of the plurality of first driving low-voltage connection portions comprises a wiring portion extended in the first direction and a pad portion electrically connected with the wiring portion.

Organic light emitting diode display device

A display device includes a substrate, a metal layer disposed on the substrate, a first conductive layer including a lower pattern disposed on the metal layer, an active layer disposed on the first conductive layer, a second conductive layer disposed on the active layer and including a first gate electrode, a pixel electrode disposed on the second conductive layer, and an emission layer and a common electrode disposed on the pixel electrode.

A display device includes a substrate; a semiconductor layer disposed on the substrate; a gate insulating film disposed on the semiconductor layer; a gate layer disposed on the gate insulating film and insulated from the semiconductor layer; an insulating film disposed on the semiconductor layer and the gate layer; and a metal layer disposed on the insulating film, wherein the semiconductor layer and the gate layer are electrically connected through the metal layer, and the semiconductor layer overlaps the gate layer in a plan view.

A display device includes: a substrate; first, second, and third data lines extending in a first direction on the substrate and disposed to be adjacent along a second direction crossing the first direction; a semiconductor layer disposed on the first, second, and third data lines; a first insulating layer disposed on the semiconductor layer; first, second, and third lower storage electrodes disposed on the first insulating layer and arranged to be adjacent along the first direction; a second insulating layer disposed on the first, second, and third lower storage electrodes; a first scan line extending in the second direction on the second insulating layer; a first pixel connected to the first scan line and the first data line; a second pixel connected to the first scan line and the second data line; and a third pixel connected to the first scan line and the third data line.

A display device including a substrate including a display area and an opening area therein, a data conductive layer on the substrate and including a source electrode and a voltage wiring in the opening area, a protective layer on the data conductive layer and covering the source electrode and the voltage wiring, a pixel electrode layer including a pixel electrode connected to the source electrode through a first contact hole, and an electrode pattern connected to the voltage wiring through a second contact hole, a pixel defining layer including an opening exposing the pixel electrode and a hole exposing the electrode pattern, a light emitting layer on the pixel defining layer and a common electrode on the light emitting layer, wherein the hole does not overlap the first and second contact holes.

Display device with pixel electrode connected to electrode pattern and protective layer

A display device includes a substrate, a first transistor disposed on the substrate and including a first active pattern having a first channel region, a first source region, a first drain region, and a first gate electrode, a first insulating layer disposed on the first transistor, a first electrode disposed on the first insulating layer and electrically connected to the first drain region, a second insulating layer having a first opening disposed on the first electrode, a first contact member disposed on the second insulating layer and electrically connected to the first electrode through the first opening, a third insulating layer having a second opening disposed on the first contact member, and a pixel electrode disposed on the third insulating layer and electrically connected to the first contact member through the second opening, and an emission layer disposed on the pixel electrode.

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Seongnam-si, South Korea

Sung Jae Moon