Samsung Electronics Co., Ltd.

Cheil Industries Inc.

Samsung Medison Co., Ltd.

Sung-Jae Lee

Youn-Jin Cho

Chul-Ho Lee

Yong-Woon Yoon

You-Jung Park

Yeon-Young Nam

Seung-Wook Suh

Chung-Heon Lee

Joon-Young Moon

Young-Seok Lee

Gi-Hoon Ko

Matsuoka Fumiya

Han-Min Lee

Hae-Me Lee

Young-Min Kim

Ji-Young Shin

Byung-Kook Baek

Young-Seok Kim

Sang-Min Kim

Hwan-Sung Cheon

Won-Hee Lee

Tai-Kyung Kim

Yoon-jung Choi

Sung-Min Hong

Hea-Jung Kim

Ho-sung Kim

Min Chul Jung

Eun-Ok Jo

Woo-Hyung Chun

Yo-Choul Park

Kyoung-Heon Jeong

Bok-Soon Ko

Woo Sik Yun

Dong Hoon Seo

Phil-Soo Jang

Kyung-Hun Song

Kwang-Jin Son

Gi-Ung Nam

A display apparatus according to an embodiment of the disclosure includes a communicator configured to receive content from an external apparatus; a display; and a controller configured to determine whether tag information related to a component of the received content matches predetermined apparatus information, and determine whether to display the content based on the determined result.

Display apparatus, content management apparatus and method for content management

Smart mirror

A computing system includes a processor that operates a plurality of virtual machines in which a plurality of operating systems are respectively executed. The processor executes a hypervisor that groups the plurality of virtual machines into a normal virtual machine group and a privilege virtual machine group, and that controls hardware accesses requested by the normal virtual machine group and the privilege virtual machine group. The processor executes a normal application in the normal virtual machine group, and executes a secure application in the privilege virtual machine group.

Computing system for securely executing a secure application in a rich execution environment

A scan data control apparatus includes a trigger circuit, a scan sequencer, a shift register, and a transmitter. The trigger circuit is configured to receive a trigger signal, detect a malfunction of a system and output a scan mode start signal and a scan mode end signal. The scan sequencer is configured to output scan enable signals corresponding to a CPU and a master to the CPU and the master. The shift register is configured to receive scan data of the CPU and the master from the CPU and the master. The transmitter is configured to receive the scan data of the CPU and the master and output the scan data to a memory.

Scan data control apparatus and electronic system having the same

Disclosed are a monomer for a hardmask composition represented by the following Chemical Formula 1, a hardmask composition including the monomer, and a method of forming patterns using the hardmask composition. 

Monomer, hardmask composition comprising monomer, and pattern forming method using hardmask composition

Disclosed are a polymer represented by the Chemical Formula 1, a monomer represented by the Chemical Formula 2, and a solvent, wherein the monomer is included in the same or a higher amount than the polymer, and a method of forming patterns using the same.

Hard mask composition and method for forming pattern using same

Disclosed are a monomer for a hardmask composition represented by the Chemical Formula 1, a hardmask composition including the monomer, and a method of forming a pattern using the same.

Monomer, hard mask composition comprising said monomer, and method for forming pattern using said hard mask composition

A monomer for a hardmask composition represented by the following Chemical Formula 1, 

Monomer for hardmask composition and hardmask composition including the monomer and method of forming patterns using the hardmask composition

A composition for a hardmask including copolymer including repeating units represented by Chemical Formulae 1 and 2 and a solvent, a method of forming a pattern using the same, and a semiconductor integrated circuit device including a pattern formed using the method are provided.

Composition for hardmask, method of forming patterns using the same, and semiconductor integrated circuit device including the patterns

Forming a dual damascene structure includes forming a first insulation layer and a second insulation layer, forming a resist mask, forming a via hole down to a lower end of the first insulation layer, forming a hardmask layer in the via hole and on the second insulation layer using a spin-coating method, forming a resist mask, forming a first trench hole down to a lower end of the second insulation layer, respectively removing a part of the hardmask layer in the via hole and a part of the hardmask layer on the second insulation layer, forming a second trench hole by removing a part of the first insulation layer between a top corner of the hardmask layer remaining in the via hole and a bottom corner of the first trench hole, removing the hardmask layer, and filling the via hole and the second trench hole with a conductive material.

Method for forming a dual damascene structure of a semiconductor device, and a semiconductor device therewith

Microwave oven

Electric oven

Impurities can be eluted simultaneously from a plurality of local areas of a surface layer of a semiconductor substrate. A supporting unit supports the substrate, and a sample plate is disposed on the surface of the substrate. The sample plate has a plurality of holes that expose the local areas of the surface of the substrate. Eluant is provided onto the local areas of the surface layer of the substrate through the holes in the sample plate. The impurities are thus dissolved by the eluant to produce a sample. A nozzle transfers the sample from the local areas of the surface of the substrate to a plurality of sample cups. Therefore, samples from the surface layer of the substrate may be produced in a short amount of time.

Method of and apparatus for eluting impurities

Growing community of inventors

Suwon-si, South Korea

Sung-Jae Lee