Samsung Techwin Co., Ltd.

Samsung Aerospace Industries, Ltd.

Sung-il Kang

Chang-han Shim

Se-Chul Park

Se-Chuel Park

Dong-Il Shin

Kyu-han Lee

Bae-soon Jang

Se-chuel Park

Sang-hun Lee

Ju-bong Kim

Sang-hoon Lee

Provided is a printed circuit board (PCB) with multiple metallic layers and a method of manufacturing the PCB to improve adhesion between a metal film and a polymer film, on which a circuit pattern is formed. The PCB includes: a first metal film; a polymer film formed on one surface of the first metal film; and a second metal film, interposed between the first metal film and the polymer film, having a first surface facing the first metal film and a second surface facing the polymer film, wherein the second surface is rougher than the first surface.

Printed circuit board with multiple metallic layers and method of manufacturing the same

Provided are a lead frame, a semiconductor package, and a method of manufacturing the lead frame and the semiconductor package. The lead frame includes: a die pad on which a semiconductor chip is installable; a plurality of lead patterns formed around a circumference of the die pad; an insulating organic material filling etching spaces interposed between the die pad and the lead patterns and structurally supporting the die pad and the lead patterns; and a pre-plating layer formed on both upper and lower surfaces of the die pad and the lead patterns.

Lead frame manufactured from low-priced material and not requiring strict process control, semiconductor package including the same, and method of manufacturing the lead frame and the semiconductor package

Provided are a circuit board with a viahole and a method of manufacturing the same. The circuit board includes: a substrate formed of an insulating material; a conductive layer disposed on the substrate; a plated layer comprising nickel and disposed on the conductive layer; and a viahole passing through the substrate, the conductive layer, and the plated layer, wherein a crystal growth direction of nickel in the plated layer is parallel to a thickness-wise direction of the substrate.

Circuit board viaholes and method of manufacturing the same

A lead frame for a semiconductor package having not only high molding resin adhesiveness and a low delamination problem under a severe moisture absorbing atmosphere but also high interface adhesiveness and solder wettability of an Au wire, and a method of manufacturing the lead frame are provided. The lead frame includes a base metal layer formed of a metal and a plurality of plating layers having different components formed on at least a surface of the base metal layer, wherein the plating layers include, a Ni plating layer deposited on at least a surface of the base metal layer and formed of Ni or an Ni alloy, a Pd plating layer stacked on at least a surface of the Ni plating layer and formed of Pd or a Pd alloy, and a protection plating layer stacked on at least a surface of the Pd plating layer and formed of Au or an Au alloy, wherein the Ni plating layer is formed to have a predetermined a thickness and a surface coarseness.

Lead frame for semiconductor package

A method for manufacturing a lead frame including the steps of electrocleaning the surface of a thin plate material, electropolishing the electrocleaned thin plate material, removing inclusions on the surface of the electropolished thin plate material, rinsing the inclusion-removed thin plate material with an acidic solution, and forming multi-plated layers on the rinsed material. The lead frame manufactured by the method has 5 or less inclusions each having approximately 1 &mgr;m, on the surface area of 1600 &mgr;m , which impede a wire bonding property or solder wettability of the lead frame.

Lead frame and method of manufacturing the lead frame

A lead frame for a semiconductor package and a method for manufacturing the lead frame. In the manufacture of the lead frame, a protective layer is formed with nickel (Ni) or Ni alloy on a metal substrate, an intermediate layer is then formed with palladium (Pd) or Pd alloy on the protective layer. Then, Pd and gold (Au) are alternately plated on the surface of the intermediate layer to form an outermost layer including both Pd and Au particles thereon.

Lead frame and method for plating the same

A lead frame plating method including the steps of (a) forming an intermediate layer on the upper surface of a metal substrate, (b) submerging the metal substrate into a plating solution, and (c) forming a passive layer to a thickness of 0.01 to 1.5 microinches on the upper surface of the intermediate layer by applying a modulated current to the plating solution and the metal substrate.

Growing community of inventors

Changwon, South Korea

Sung-il Kang