Samsung Electronics Co., Ltd.

Pi Advanced Materials Co., Ltd.

Sung-il Cho

In-kyeong Yoo

Eun-hong Lee

Choong-rae Cho

Ki-ho Shin

Byung-Joon Moon

Sung Won Kim

Chang-Wook Moon

Dong Young Won

Chang-jin Kang

Jun Ho Seo

Yong-Hyun Kwon

Jae-Kyu Ha

Sang-joon Park

The present invention relates to a polyimide film and a preparation method thereof. According to the present invention, a polyamic acid solution having a high weight-average molecular weight may be obtained by adjusting viscosity and solid content of the polyamic acid solution, and thus, a desired polyimide film may be prepared therefrom. Furthermore, since a length of carbon chains rearranged during graphitization is increased, a graphite sheet having excellent thermal conductivity can be prepared from the polyimide film of the present invention. Also, since the polyimide film has improved windability by further including inorganic particles as a filler, it may facilitate the wind operation.

Polyimide film and method for producing same

A nonvolatile memory device may include a lower electrode, an oxide layer including an amorphous alloy metal oxide disposed on the lower electrode, and a diode structure disposed on the oxide layer.

Nonvolatile memory device including amorphous alloy metal oxide layer and method of manufacturing the same

A nonvolatile memory device includes at least one switching device and at least one storage node electrically connected to the at least one switching device. The at least one storage node includes a lower electrode, one or more oxygen-deficient metal oxide layers, one or more data storage layers, and an upper electrode. At least one of the one or more metal oxide layers is electrically connected to the lower electrode. At least one of the one or more data storage layers is electrically connected to at least one of the one or more metal oxide layers. The upper electrode is electrically connected to at least one of the one or more data storage layers. A method of manufacturing the nonvolatile memory device includes preparing the at least one switching device and forming the lower electrode, one or more metal oxide layers, one or more data storage layers, and upper electrode.

Nonvolatile memory devices including oxygen-deficient metal oxide layers and methods of manufacturing the same

A double pattern method of forming a plurality of contact holes in a material layer formed on a substrate is disclosed. The method forms a parallel plurality of first hard mask patterns separated by a first pitch in a first direction on the material layer, a self-aligned parallel plurality of second hard mask patterns interleaved with the first hard mask patterns and separated from the first hard mask patterns by a buffer layer to form composite mask patterns, and a plurality of upper mask patterns in a second direction intersecting the first direction to mask selected portions of the buffer layer in conjunction with the composite mask patterns. The method then etches non-selected portions of the buffer layer using the composite hard mask patterns and the upper mask patterns as an etch mask to form a plurality of hard mask holes exposing selected portions of the material layer, and then etches the selected portions of the material layer to form the plurality of contact holes.

Method of forming fine patterns using double patterning process

An apparatus having various on-screen display (OSD) functions and methods for each function are provided. The apparatus includes an on-screen display device for receiving serial data having a RAM write address, a ROM address, and the on-screen display functions. The apparatus synthesizes a character signal corresponding to serial data with a background color signal or an external composite video signal in response to an internal or external composite synchronous signal and provides the result to a monitor. The apparatus also includes a synchronous signal generating device for generating internal horizontal and vertical synchronous signals upon receiving a main clock signal, synthesizing means for synthesizing an internal equalization pulse with the internal horizontal and vertical synchronous signals, and means for determining the internal composite synchronous signal or the external composite synchronous signal extracted from the composite video signal. A control device is also part of the OSD apparatus. The control device outputs user serial data to the on-screen display device, generates the main clock signal from a system clock, and controls the on-screen display device and the synchronous signal generating device.

Apparatus for performing various on-screen display functions and methods for each function

A reproduction error correction circuit for a video reproduction system includes a line-storage memory for temporarily storing composite video signal samples, which memory is operated to provide both for time-base correction and for drop-out compensation. The memory is cyclically supplied sequential write addresses descriptive of pixel locations along a horizontal scan line, generated at a rate that tracks any jitter in the input video signal selectively used for writing over the previous contents of the memory. The memory is cyclically supplied sequential read addresses offset 1/2 scan line from the write addresses, generated at a stable rate equal to an average over several scan lines of the rate at which write addresses are generated. This provides for time-base error correction. When a drop-out is detected, overwriting of video signal samples already stored in the single line-storage memory is prohibited. This type of overwrite protection implements automatic replacement of the video signal during periods when drop-out is detected. The phase of the chrominance signal component of the delayed video used for drop-out compensation is adjusted, however, when necessary, to correspond to that required in the replacement signal.

Reproduction error correction circuit for a video reproduction system,

Reproduction error correction circuit for a video reproduction system &

A data coincidence detecting circuit including a register for receiving n-bit data, a counter for counting up until 2.sup.n to compare the n-bit data with it, a comparator for comparing the outputs of the register and the outputs of the counter, respectively to generate a coincidence detecting signal, a mask portion connected to the output of the comparator for masking the period from a time point when the n-bit data is input to a time point when the input of data ends, and a logic circuit for logically adding the output of the mask portion and the output of the comparator to output the result.

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Yongin-si, South Korea

Sung-il Cho