Samsung Electronics Co., Ltd.

Sung-Hyun Lee

Dong-Soo Kang

Jun-Hee Yoo

Chul-woo Park

Young-Soo Sohn

Hak-soo Yu

Jae-Youn Youn

Jung-Hwan Cho

Heu-Gon Kim

Su-a Kim

Bub-chul Jeong

Oh-Dal Kwon

Hyo-jin Choi

Kyoung-Heon Jeong

Jin-Kyung Choi

A system on chip (SOC) includes a slave device, a plurality of master devices, an interconnect device and a plurality of service controllers. The master devices generate requests to demand services from the slave device. The interconnect device is coupled to the slave device and the master devices through respective channels, and the interconnect device performs an arbitrating operation on the requests. The service controllers control request flows from the master devices adaptively depending on an operational environment change of the SOC.

Adaptive service controller, system on chip and method of controlling the same

In one example embodiment, a memory system includes a memory module and a memory controller. The memory module is configured generate density information of the memory module based on a number of the bad pages of the memory module, the bad pages being pages that have a fault. The memory controller is configured to map a continuous physical address to a dynamic random access memory (dram) address of the memory module based on the density information received from the memory module.

Memory system for continuously mapping addresses of a memory module having defective locations

In a semiconductor memory device and an internal data transmission method thereof, the device includes a memory controller, a pair of data lines, and a plurality of memory banks. During an internal data transmission operation, the memory controller externally receives and stores a source address and a target address in response to an externally applied command and outputs an internal control signal and an internal address signal using the source address and the target address. The internal control signal includes an internal write signal and an internal read signal. Transmission data is transmitted on the pair of data lines during the internal data transmission operation. The plurality of memory banks read the transmission data stored in a region corresponding to the source address in response to the internal read signal, transmit the transmission data on the pair of data lines, and write the transmission data transmitted on the pair of data lines in response to the internal write signal. During the internal data transmission operation, the transmission data is transmitted from the region corresponding to the source address to a region corresponding to the target address, and is not output external to the semiconductor memory device.

Semiconductor memory device and internal data transmission method thereof

An optical power splitter is provided that can stably operate even when there is a mode mismatch between an input optical signal and the optical power splitter. The optical power splitter of the present invention includes a semiconductor substrate, an optical waveguide stacked on the semiconductor substrate, and a clad surrounding the optical waveguide. The optical waveguide includes an input waveguide section through which the optical signal is input from an outer waveguide, a tapered waveguide section having a gradually increasing width, first and second waveguide branches extending from an output end of the tapered waveguide section and outputting first and second branched optical signals, and a stabilizing waveguide section disposed between the input waveguide section and the tapered waveguide section, the stabilizing waveguide section having length and width capable of stabilizing shaking of the optical signal which is generated by a mode mismatch between the optical signal and the input waveguide section.

Optical power splitter having a stabilizing waveguide

A planar light waveguide circuit includes a plurality of landmarks arranged on the planar light waveguide circuit at intervals of a specific gap starting from a cut section of the planar light waveguide circuit so as to increase the uniformity of a coupling loss that occurs when connecting the planar light waveguide circuit in alignment with optical fiber blocks, wherein the landmarks are formed onto the planar light waveguide circuit so as to enable an operator to monitor a permissible angle error, and wherein Arabic numerals or specific symbols are marked in association with the landmarks to help the operator distinguish the landmarks.

Planar light waveguide circuit with landmarks

Growing community of inventors

Gwangju-si, South Korea

Sung-Hyun Lee