Electronics and Telecommunications Research Institute

Samsung Electronics Co., Ltd.

Korea Telecom

Sung-Hyuk Byun

Ju-Yong Lee

Jeong-Won Heo

Jong-Arm Jun

Jae-Jin Shin

Dan-Keun Sung

Jin-Woo Yang

Dan-keun Sung

Kyung-geun Lee

Byungjun Ahn

Young-Sun Kim

Kyeong-Ho Lee

Byung-Jun Ahn

Kyung-Geun Lee

Soo-Jong Lee

Tae-Won Kim

Seung-Yeob Nam

The present invention relates to a multi-path communication device capable of improving energy use efficiency and a traffic distribution method for improving the energy use efficiency thereof, which can improve energy use efficiency of an entire network in multi-path communication by properly adjusting the number of paths for transmitting traffic according to traffic levels and distributing the traffic without distributing and transmitting the traffic to all possible paths.

Multi-path communication device capable of improving energy use efficiency and traffic distribution method for improving energy use efficiency thereof

Disclosed is a configuration method and device for a two-dimensional expandable crossbar matrix switch for application to tera-level high-speed and large-capacity switches. The present invention includes N input ports, N output ports, and an N&#xd7;N matrix switch for transmitting cells between the input and output ports. Each input port includes N VOQs which are sequentially combined by n VOQs to configure respective L VOQ groups. The L VOQ groups are connected to L XSUs through independent interface ports. Therefore, each input port can transmit a maximum of L cells to the matrix switch during one cell time slot.

Scalable crossbar matrix switch and arbitration method thereof

A high speed and high capacity switching apparatus is disclosed. The apparatus includes: N input ports each of which for outputting maximum l cells in a time slot, wherein each of the N input ports includes N virtual output queues (VOQs) which are grouped in l virtual output queues group with n VOQs; N&#xd7;N switch fabric having lcrossbar switch units for scheduling cells inputted from N input ports based on a first arbitration function based on a round-robin, wherein l VOQ groups are connected to l XSUs; and N output ports connected to l XSUs for selecting one cell from l XSUs in a cell time slot by scheduling cells by a second arbitration function based on a backlog weighed round-robin, which operates independently of the first arbitration function, and transferring the selected cell to its output link.

Scalable crossbar matrix switching apparatus and distributed scheduling method thereof

An ATM switch having the buffer threshold controller to control the cell input into the switching element using the back-pressure signal and a method for determining the buffer threshold according to the buffer threshold controller are disclosed. The ATM switch includes buffer pool storing the cell input to the switch; buffer pool control part storing the buffer pool occupancy information per input port of the buffer pool; threshold control part receiving the buffer pool occupancy information from the buffer pool control part and calculating the threshold per input port periodically and then sending it to the buffer pool control part; input crosspoint control part controlling the cells input to the buffer pool by receiving the control signal from the buffer pool control part; and output crosspoint control part controlling the cells output from the buffer pool by receiving the control signal from the buffer pool control part. The method includes the steps of calculating r , the buffer pool occupancy rate of the ith input port (i&equals;1, 2, 3, . . . , N); calculating r , the threshold of the buffer pool occupancy rate of the ith input port; calculating L , the number of occupation of the cells in the buffer pool of the ith input port; calculating the difference, D &equals;t &minus;L (k&equals;1, 2, 3, N . . . , N) between t , the threshold of the jth input port and L , the number of cells stored in the buffer pool, where i&ne;j (j&equals;1, 2, 3, . . . , N); calculating t , the threshold in case where the t &minus;L is the kth value in descending order from the N input ports; calculating b , minimum threshold to guarantee the minimum cell input; and comparing &Dgr;, the minimum unit of increase or decrease of the threshold and the value of t &minus;b .

ATM switch and a method for determining buffer threshold

A controller for the logical buffer depth in ATM switching system and a method for determining the logical queue depth, using the back-pressure signal and the occupied buffer depth information and supporting the P classes, are disclosed. The controller includes Routing Table Element making tag for routing of input cell; Input Buffer storing the cell that a tag is attached to in said routing table element; Switch fabric that reads the cell from said input buffer and then switches it to the output port; and Input buffer controller controlling the logical queue size in said input buffer. And the method for determining the logical queue depth includes the steps of calculating the back-pressure signal occurrence rate b,of the ith class; calculating the back-pressure signal occurrence threshold rate b,of the ith class; calculating the buffer depth T,of the logical queue of the ith class; calculating threshold values T,T,of the two buffer depths of the ith class; calculating the buffer size L,of the logical queue of the ith class; calculating the empty area size D,(j&equals;1, 2, 3, L, P) of logical queues for the number of p classes.

Input buffer controller using back-pressure signals in ATM switches and a method for determining the logical queue size

An idle address controller for a shared buffer type ATM switch controls the addresses of output cells in a common memory to be stored directly in an idle address buffer without passing through the conventional idle address delay controller, by improving the idle address control scheme of a unit switch. The idle address controller includes an idle address control signal generator for generating idle address control signals based on the buffer length information from counters, idle address control signal buffers for storing the idle address control signals, and an idle address control signal multiplexer. Therefore, the idle addresses can be efficiently provided, and this mechanism lowers cell loss and reduces required memory capacity.

Idle address controller for shared buffer type ATM switch

Growing community of inventors

Daejeon, South Korea

Sung-Hyuk Byun