Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Sung-hoon Yang

Chong-Chul Chai

So-Woon Kim

Soo-Wan Yoon

Yeon-Ju Kim

Chang-Oh Jeong

Mee-Hye Jung

Kyoung-Ju Shin

Je-Hun Lee

Yong-Woo Lee

Jae-Byung Park

Jung-Hyeon Kim

Eun-Guk Lee

Joo-Ae Youn

Sung-Jin Hong

Hee-wook Do

Tae-Hyung Hwang

Hye-ran You

Seung-hoo Yoo

Mun-Soo Park

So-Hyun Lee

Kwang-Hoon Lee

Il-Pyung Lee

Hyun-cheol Moon

Chang-Hyeon Shin

Yeon-joo Kim

A liquid crystal display device including a first substrate including a pixel electrode, a second substrate facing the first substrate and including a common electrode, and a liquid crystal layer interposed between the first substrate and the second substrate. The first substrate includes a storage capacitive line. The liquid crystal display device further includes a domain forming member that is formed over a first region corresponding to the storage capacitive line and a second region adjacent to the first region. The domain forming member is formed with irregular parts including a first irregular part having an enlarged width, a second irregular part having a reduced width, and an external irregular part, which is closest to the first region of the irregular parts formed in the second region and has an enlarged width.

Liquid crystal display device

Disclosed is an electrophoretic display and a method for driving the electrophoretic display. The method for driving the electrophoretic display, which includes a first electrode, a second electrode, and an electrophoretic layer including electrophoretic particles disposed in a plurality of pixels receiving the voltage for driving from the first electrode and the second electrode and provided between the first electrode and the second electrode includes applying a reset voltage to the pixels, applying a reset compensation voltage including reversed polarity to the reset voltage to the pixels, applying an image display voltage including the same or different polarity during a predetermined time between the neighboring pixels, and applying an image display compensation voltage including reversed polarity to the image display voltage to the pixels during a predetermined time. The foregoing method provides a potential distribution which is symmetrical in the boundary region between the neighboring pixels such that the display size of the real image of each of the pixels is uniform and an afterimage may be prevented, thereby improving the display performance.

Electrophoretic display and method for driving the same

A method for removing noise of a gate signal that is outputted from a gate driving circuit including a plurality of stages, the method includes electrically connecting two terminals of two adjacent stages that have noise components opposite in phase to each other during a first period, and electrically disconnecting the two terminals of the two adjacent stages that have the noise components opposite in phase to each other during a second period.

Method for removing noise, switching circuit for performing the same and display device having the switching circuit

A fan-out unit which can control a resistance difference among channels with efficient space utilization and a thin-film transistor (TFT) array substrate having the fan-out unit are presented. The fan-out unit includes: an insulating substrate; a first wiring layer which is formed on the insulating substrate and connected to a pad; a second wiring layer which is formed on the insulating substrate and connected to a TFT; and a resistance controller which is connected between the first wiring layer and the second wiring layer and includes a plurality of first resistors extending parallel to the first wiring layer and a plurality of second resistors extending perpendicular to the first resistors and alternately connecting to the first resistors, wherein the first resistors are longer than the second resistors.

Fan-out unit and thin-film transistor array substrate having the same

A display substrate having a fan-out and a method for manufacturing the display substrate are disclosed. The fan-out includes an insulating substrate, a first line, a second line, a resistance control pattern, and first and second detour pattern. The first line is disposed on the insulating substrate and is connected to a pad. The second line is formed from the same layer as the first line and is connected to a thin-film transistor (TFT). The resistance control pattern is formed from a different layer than the first and second lines. The first and second detour patterns are formed from a different layer than the first and second lines and the resistance control pattern, and connect the first and second lines with the resistance control pattern, respectively.

Fan-out, display substrate having the same and method for manufacturing the display substrate

An array substrate includes a base substrate which includes a display area and a peripheral area adjacent to the display area, a plurality of fan-out lines arranged in the peripheral area to receive a driving signal from an exterior source, at least one fan-out line among the plurality of fan-out lines arranged on a different layer from a layer on which remaining fan-out lines of the plurality of fan-out lines are arranged, a plurality of signal lines arranged in the display area to receive the driving signal from the plurality of fan-out lines and a pixel array arranged in the display area to receive the driving signal from the plurality of signal lines.

Array substrate, display apparatus having the same

A display substrate includes respective pluralities of gate lines, data lines, switching elements, storage lines, pixel electrodes, and an organic insulation layer. The gate lines and the data lines define a plurality of unit pixels. The storage lines are respectively formed adjacent to the respective drain electrodes of the respective switching elements of respective rows of the unit pixels. The organic insulation layer has a hole that is formed within the area of each of the unit pixels and that extends from a contact area formed at a portion of the corresponding drain electrode of the pixel to a portion corresponding to the storage line thereof. This arrangement enables the marginal area needed to prevent mismatch of the hole in the areas of the contact area and the storage line to be reduced, thereby increasing the aperture ratio of the display.

LCD aperture ratios

A thin film transistors (TFTs) substrate is structured to maintain as constant across the area of the substrate a kickback voltage due to Miller capacitance between the drain and gate of each TFT even in the presence of manufacturing induced misalignments between the drain electrodes and corresponding gate lines. Each thin film transistor includes a gate electrode, an active layer formed on the gate electrode so as to overlap the gate electrode, first and second source electrodes respectively connected to first and second data lines each of which crosses the gate line while being insulated from the gate line, and an elongated drain electrode located between the first and second source electrodes and disposed over the gate electrode so as to a crossing length of the drain electrode is larger than an underlying width of the gate electrode such that misalignment induced shifts of the position of the gate electrode relative to the drain electrode does not substantially change overlap area between the two.

Thin film transistor substrate having structure for compensating for mask misalignment

Growing community of inventors

Yongin-si, South Korea

Sung-hoon Yang