Samsung Electronics Co., Ltd.

Sung-Ho Joo

Jae-young Lee

Chang-Hyun Cho

Joon-Yeon Kim

Gyu-Yeol Kim

Yu-Kyum Kim

A test interface board includes one or more relay circuits and a synchronization signal generator. The relay circuits duplicate a test signal from an automated test equipment (ATE), apply duplicated test signals to each of a plurality of devices under test (DUTs) through one of corresponding channels, and provide the ATE with a plurality of test result signals received from each of the DUTs in response to the duplicated test signals. The synchronization signal generator receives a plurality of status signals from each of the DUTs and provides a timing synchronization signal to the ATE. Each of the status signals indicates a completion of a test operation in one of the DUTs, the test operation is associated with the test signal, and the synchronization signal generator activates the timing synchronization signal when all of the status signals indicate the completion of the test operation.

Test interface boards, test systems, and methods of operating test interface boards

A pogo pin may include a housing, a resilient connecting member and a switching unit. The housing may be arranged between a printed circuit board (PCB) and a probing head. The resilient connecting member may be arranged in the housing to electrically connect the PCB with the probing head. The switching unit may be provided in the housing to selectively cut off an electrical connection between the PCB and the probing head. Thus, because the PCB may not require additional switching substrates, the PCB may have a small size so that the probe card may also have a small size. A semiconductor device may be manufactured using the probe card.

Growing community of inventors

Hwaseong-si, South Korea

Sung-Ho Joo