Samsung Electronics Co., Ltd.

Samsung Sds Co., Ltd.

Kmw Inc

Other

Korea Research Institute of Standards and Science

Sung-Ho Jang

Jae-Young Park

Kwang-Min Choi

Sang-Hoon Han

Bong-Soo Kim

Joon Soo Han

Jun-Hee Lim

Joung-hoe Kim

Min-Sung Kang

In-Hyok Cha

Yong-Wook Jeong

Yoo-Sang Hwang

Byung-Chul Kim

Satoru Yamada

Yu-sin Yang

Duk-Yong Kim

Tae-Young Chung

Dae-Ik Kim

Dong-jin Lee

Je-min Park

Chan-Sic Yoon

Nam-Shin Park

Ki-Seok Lee

Augustin Jinwoo Hong

Yasuhiro Hidaka

Sung-Sam Lee

Yong-Jin Choi

Ho Jun Yu

Sang-Ho Song

Young-kyu Park

Min-Seok Choi

Min-Young Shim

Ju-yong Lee

Joung-Hoe Kim

Kwang-Woo Lee

Chae-mook Lim

Ki-Jae Huh

Chin-Wook Chung

Min-Hyung Lee

Won-Tae Park

Dong-Min Han

Ye-eun Park

Sang-Hoon Hang

An extreme ultraviolet (EUV) light concentrating apparatus including a main body having a concave inner portion and configured to rotate, a tin generator configured to generate tin drops and spray the tin drops, a tin catcher configured to process the sprayed tin drops, a protective cover configured to block the tin drops from falling into the main body, and a rotation guide configured to rotate the main body may be provided.

EUV light concentrating apparatus and lithography apparatus including the same

A cavity-type radio frequency filter is disclosed. the radio frequency filter having a cavity structure including an enclosure, a resonant element, a cover, a frequency tuning screw, and a resilient fixing member. The enclosure has a hollow inside and an open surface on one side to have a cavity. The resonant element is positioned in the hollow of the enclosure. The cover has a screw hole having a preset diameter at a position corresponding to the resonant element, and is configured to seal the open surface of the enclosure. The frequency tuning screw is configured to be screwed into the screw hole of the cover, and it has an upper end formed at least partially with a latching abutment that protrudes outwardly.

Cavity-type radio frequency filter

Provided is a hyperspectral imaging (HSI)-based inspection apparatus capable of quickly and stably performing two-dimensional (2D) HSI for an inspection object, and accordingly, capable of quickly and accurately inspecting the inspection object. The HSI-based inspection apparatus includes: a stage on which an inspection object is arranged; an optical system configured to allow light to be incident on the inspection object and emit the light reflected from the inspection object; a scan mirror configured to reflect the emitted light from the optical system while rotating; and a hyperspectral camera configured to obtain an image having a wavelength direction and a line direction as two axes for light reflected from the scan mirror, wherein, by using the rotation of the scan mirror, the hyperspectral camera is configured to perform the 2D HSI for the inspection object.

Inspecting apparatus based on hyperspectral imaging

The present invention relates to a cavity type wireless frequency filter having a cross-coupling notch structure, the filter comprising a notch substrate provided for cross-coupling between at least two resonance elements among a plurality of resonance elements, wherein the notch substrate comprises: a main substrate, which is made of a non-conductive material and has the first and second coupling structures mechanically coupled with at least two resonance elements, respectively; and a conductive line which is implemented by a conductive pattern formed on the main substrate and transfers a signal of a first resonance element to a second resonance element by using a non-contact coupling method.

Cavity type wireless frequency filter having cross-coupling notch structure

A semiconductor device includes a substrate including a cell array region including a cell active region. An insulating pattern is on the substrate. The insulating pattern includes a direct contact hole which exposes the cell active region and extends into the cell active region. A direct contact conductive pattern is in the direct contact hole and is connected to the cell active region. A bit line is on the insulating pattern. The bit line is connected to the direct contact conductive pattern and extends in a direction orthogonal to an upper surface of the insulating pattern. The insulating pattern includes a first insulating pattern including a non-metal-based dielectric material and a second insulating pattern on the first insulating pattern. The second insulating pattern includes a metal-based dielectric material having a higher dielectric constant than a dielectric constant of the first insulating pattern.

Semiconductor device including a bit line

A three-dimensional printing control apparatus comprises a control command generator configured to: generate a control command for outputting a three-dimensional object having a first shape, and generate, in response to a request for changing a shape of the three-dimensional object from the first shape to a second shape is received while performing a output work for the three-dimensional object, an additional control command for outputting a changed three-dimensional object having the second shape; and a control command transmitter configured to, in response to determining that it is possible to output the changed three-dimensional object through the output work, substitute the additional control command for the control command with respect to a non-printed portion of the three-dimensional object.

Three-dimensional printing control apparatus and method

Disclosed are an apparatus and method of generating a bitmap of a 3D model. The apparatus for generating a bitmap of a 3D model includes a pixel column generator configured to divide a 3D space into a plurality of pixel columns parallel to an output direction of a 3D printer, an intersection point calculator configured to calculate intersection points between the plurality of pixel columns and the 3D model, a rasterizer configured to rasterize the pixel columns and determine a support material region in each of the rasterized pixel columns based on the intersection points; and a bitmap generator configured to generate the bitmap of the 3D model by merging the rasterized pixel columns.

Apparatus and method for generating bitmap of 3-dimensional model

An apparatus for controlling 3D printing includes an output determiner configured to determine, after generating a first control command to output a 3D object, whether an additional 3D object is able to be output through an output task for the 3D object, and a control command generator configured to generate a second control command to output a not-yet-output part of the 3D object and the additional 3D object if it is determined that the additional 3D object is able to be output through the output task.

Apparatus and method for control of three-dimensional printing

The specification of the instant application is amended. Submitted herewith is a Substitute Specification. The Substitute Specification complies with 37 C.F.R. &#xa7;&#xa7;1.52(a)-(b) and 1.125(b), and no new matter has been added to the Substitute Specification. Submitted herewith are clean and marked up versions of Substitute Specification in compliance with 37 C.F.R. &#xa7;&#xa7;1.121(b)(3) and 1.125(c). Entry of the Substitute Specification is respectfully requested.

System and method for processing color of three-dimensional object

Provided are a system and method for transmitting cross-sectional images of a three-dimensional (3D) object and a transmitting apparatus for executing the same. A system for transmitting cross-sectional images of a 3D object includes a transmitting apparatus configured to search for a changed region between cross-sectional images of adjacent layers among a plurality of cross-sectional images generated by slicing the 3D object in a horizontal direction, and compress the cross-sectional images using information about the changed region and a receiving apparatus configured to receive the compressed cross-sectional images from the transmitting apparatus and restore the compressed cross-sectional images using the information about the changed region and cross-sectional image information of a layer lower than the layers desired to be restored.

System and method for transmitting cross-sectional images of three-dimensional object and transmitting apparatus for executing the same

There is provided a semiconductor device. The semiconductor device may include multiple contacts plugs, an insulation layer pattern, a metal oxide layer pattern, a metal pattern and a metal line. The contact plugs contact a substrate. The insulation layer pattern is formed between the contact plugs and has a top surface lower than those of the contact plugs. The metal oxide layer pattern is formed on the insulation layer pattern, and has a dielectric constant higher than that of silicon oxide. The metal pattern is formed on the metal oxide layer pattern and contacts sidewalls of the contact plugs. The metal line contacts top surfaces of the contact plugs and the metal pattern and extends thereon.

Semiconductor devices

A semiconductor device including a buried cell array transistor and an electronic device including the same are provided. The device includes a field region in a substrate and the filed region defines an active region. A first source/drain region and a second source/drain region are in the active region. A gate trench is between the first and second source/drain regions, and in the active region and the field region. A gate structure is within the gate trench. The gate structure includes a gate electrode, an insulating gate capping pattern on the gate electrode, a gate dielectric between the gate electrode and the active region, and an insulating metal-containing material layer between the insulating gate capping pattern and the active region.

Transistor, semiconductor device, and semiconductor module including the same

Disclosed is a device selection structure for selecting one or more devices, comprising: a plurality of devices each having an input port and an output port; and a device module including a movement plate installed movably in conjunction with the plurality of devices, an input connector, and an output connector, wherein the input and output ports of the plurality of devices and the input and output connectors of the device module are installed so that during movement of the movement plate, the input and output ports of the plurality of devices are sequentially connected, at predetermined positions, to the input and output connectors of the device module.

Selecting structure for device

A semiconductor device employing a transistor having a recessed channel region and a method of fabricating the same is disclosed. A semiconductor substrate has an active region. A trench structure is defined within the active region. The trench structure includes an upper trench region adjacent to a surface of the active region, a lower trench region and a buffer trench region interposed between the upper trench region and the lower trench region. A width of the lower trench region may be greater than a width of the upper trench region. An inner wall of the trench structure may include a convex region interposed between the upper trench region and the buffer trench region and another convex region interposed between the buffer trench region and the lower trench region. A gate electrode is disposed in the trench structure. A gate dielectric layer is interposed between the gate electrode and the trench structure.

Semiconductor device employing transistor having recessed channel region and method of fabricating the same

A semiconductor integrated circuit device having a 6Flayout is provided. The semiconductor integrated circuit device includes a substrate; a plurality of unit active regions disposed in the substrate and extending in a first direction; first and second access transistors including first and second gate lines disposed on the substrate and extending across the unit active regions in a second direction forming an acute angle with the first direction; a first junction area disposed in the substrate between the first and second gate lines and second junction areas disposed on sides of the first and second gate lines where the first junction area is not disposed; a plurality of bitlines disposed on the substrate and extending in a third direction forming an acute angle with the first direction; and a plurality of bitline contacts directly connecting the first junction area and the bitlines.

Semiconductor integrated circuit device and method of fabricating the semiconductor integrated circuit device

Growing community of inventors

Seoul, South Korea

Sung-Ho Jang