Electronics and Telecommunications Research Institute

Sung-Bum Bae

Jae Kyoung Mun

Eun Soo Nam

Sang Choon Ko

Young Rak Park

Woojin Chang

Chi Hoon Jun

Sung Bock Kim

Seok-Hwan Moon

Hyung Seok Lee

Je Ho Na

Zin-Sig Kim

Hyung Sup Yoon

Jong-Won Lim

Dong Min Kang

Byoung-Gue Min

Hokyun Ahn

Woo-Young Jang

Kyu Jun Cho

Jeong-Jin Kim

Sung-Jae Chang

Hyungyu Jang

Provided is a heat dissipating substrate including a diamond substrate, wherein an upper portion of the diamond substrate has a concave-convex structure including recessed regions that are spaced apart from each other, and insulation patterns that fill the recessed regions. The insulation patterns include at least one of silicon carbide, silicon nitride, silicon oxide, aluminum nitride, and aluminum oxide.

Heat dissipating substrate comprising diamond and semiconductor integrated device including the same

Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a substrate having a first region and a second region, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a barrier layer disposed on the semiconductor layer, a first source electrode, a first drain electrode, and a first gate electrode disposed therebetween, which are disposed on the barrier layer in the first region, a second source electrode, a second drain electrode, and a second gate electrode disposed therebetween, which are disposed on the barrier layer in the second region, and a ferroelectric pattern interposed between the first gate electrode and the barrier layer.

Semiconductor device and method of fabricating the same

A method for fabricating a semiconductor device includes sequentially laminating a separation layer and a first substrate layer on a sacrificial substrate, and forming a heat dissipation plate comprising a first region and a second region on the first substrate layer. The method further includes removing the sacrificial substrate and the separation layer, and patterning the first substrate layer to form a first substrate exposing the heat dissipation plate in the second region and contacting the heat dissipation plate in the first region, and forming a first element on the first substrate. The method still further includes forming a plurality of conductive pads disposed on the heat dissipation plate in the second region and a first line connecting at least one of the plurality of conductive pads to the first element, and forming a second element on the conductive pads in the second region.

Semiconductor device and method for fabricating the same

Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes a heat dissipation plate including a first region and a second region, a first element disposed on the heat dissipation plate in the first region, and a second element disposed on the heat dissipation plate in the second region. The first element includes a first substrate, the second element includes a second substrate, the first substrate includes a material different from a material of the second substrate, the first substrate contacts the heat dissipation plate, and the second element is bonded to the heat dissipation plate in a flip-chip bonding manner.

A semiconductor device includes a first semiconductor layer. A second semiconductor layer is disposed on the first semiconductor layer. A structure layer is disposed on the second semiconductor layer. A metal film covers a side surface of the first semiconductor layer, a side surface of the second semiconductor layer, and an upper surface of the structure layer. A flexible substrate covers the metal film.

Semiconductor device

Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.

A method for manufacturing a semiconductor device includes sequentially stacking a first epitaxial layer, a sacrificial layer, a second epitaxial layer, and a third epitaxial layer on a first substrate, forming a trench which penetrates the third epitaxial layer, the second epitaxial layer, and the sacrificial layer, forming a structure layer on an upper surface of the third epitaxial layer, forming a metal film which covers an inner surface of the trench and the structure layer, forming a second substrate which fills the trench and covers the metal film, and separating the second epitaxial layer, the third epitaxial layer, and the structure layer from the first epitaxial layer.

Semiconductor device and method for manufacturing the same

Provided is a method of manufacturing a nitride semiconductor device. The method includes forming a plurality of electrodes on a growth substrate on which first and second nitride semiconductor layers are sequentially stacked, forming upper metal layers on the plurality of electrodes respectively, removing the growth substrate to expose a lower surface of the first nitride semiconductor layer, and forming a third nitride semiconductor layer and a lower metal layer sequentially on the exposed lower surface of the first nitride semiconductor layer.

Methods of manufacturing nitride semiconductor devices

Provided is a nitride semiconductor device including: a substrate having through via holes; first and second nitride semiconductor layers sequentially stacked on the substrate; drain electrodes and source electrodes provided on the second nitride semiconductor layer; and an insulating pattern provided on the second nitride semiconductor layer, the insulating pattern having upper via holes provided on the drain electrodes, wherein the through via holes are extended into the first and second nitride semiconductor layers and expose a bottom of each of the source electrodes.

Nitride semiconductor device

Provided are an electronic chip and a method of fabricating the same. The semiconductor chip may include a substrate, an active device integrated on the substrate, a lower interlayered insulating layer covering the resulting structure provided with the active device, a passive device provided on the lower interlayered insulating layer, an upper interlayered insulating layer covering the resulting structure provided with the passive device, and a ground electrode provided on the upper interlayered insulating layer. The upper interlayered insulating layer may be formed of a material, whose dielectric constant may be higher than that of the lower interlayered insulating layer.

Electronic chip and method of fabricating the same

The inventive concept provides methods for manufacturing a semiconductor substrate. The method may include forming a stop pattern surrounding an edge of a substrate, forming a transition layer an entire top surface of the substrate except the stop pattern, and forming an epitaxial semiconductor layer on the transition layer and the stop pattern. The epitaxial semiconductor layer may not be grown from the stop pattern. That is, the epitaxial semiconductor layer may be isotropically grown from a top surface and a sidewall of the transition layer by a selective isotropic growth method, so that the epitaxial semiconductor layer may gradually cover the stop pattern.

Growing community of inventors

Daejeon, South Korea

Sung-Bum Bae