Redpine Signals, Inc.

Sundaram Vanka

Partha Sarathy Murali

Logeshwaran Vijayan

Phanimithra Gangalakurthi

Vaidyanathan Karthik

Karthik Vaidyanathan

Kashiviswanath Nethi

A channel smoothing filter with a finite impulse response (FIR) has a controller which reads parallel sample data out of an FFT memory in such a manner as to generate an even function, the sample data applied to a preamble equalizer accompanied by a preamble sign and zero, the preamble outputs coupled to three filter processors, each filter processor having four filter engines whose outputs are summed, the channel smoothing filter generating an a register output, the register input coupled to a summer which has as inputs: the first filter processor shifted by four, the second filter processor shifted by two, the third filter processor, and the register output. Coefficients for an edge filter and a central filter are provided in Zero Sign Shift (ZSS) format, and by selection of coefficients using a canonical signed digit (CSD) algorithm, no multipliers are required for the channel smoothing FIR filter.

Channel estimation filter for OFDM receiver

A process for equalizing streams of OFDM subcarrier data computes the noise variance for each stream, and forms a stream weighting coefficient by equalizing the noise variance, such that for a first stream having a noise variance &#x3c3;and a second stream having a noise variance of &#x3c3;, the first stream is scaled by and the second stream is scaled by 

Stream weight estimation and compensation in SIMO/MIMO OFDM receivers

A reduced complexity maximum likelihood decoder receives a stream of symbols Y and channel estimate H. A transformation converts Y and H into Z and R by computing matrix R, such that the product of R and Q produces matrix H. A second transformation column-swaps matrix H to form H', thereafter generating Q&#x2032; and R&#x2032; subject to the same constraints as was described for Q and R. Transformed variables Z and Z&#x2032; are formed by multiplying Y by Qand Q&#x2032;, respectively. Table entries with Z and R and Z&#x2032; and R&#x2032; have entries of all possible xaccompanied by estimates of xderived from xand Z, and similar entries of all possible xaccompanied by estimates of xderived from xand Z&#x2032;. Hard and soft decisions are made by finding the minimum distance metric of the combined entries of the first and second table.

Reduced complexity maximum likelihood decoder for MIMO communications

A Reed Solomon decoder utilizes re-configurable and re-usable components in a granular configuration which provides an upper array and a lower array of repeated Reconfigurable Elementary Units (REU) which in conjunction with a FIFO can be loaded with syndromes and correction terms to decode Reed Solomon codewords. The upper array of REUs and lower array of REUs handle the Reed Solomon decoding steps in a pipelined manner using systolic REU structures. The repeated REU includes the two registers, two Galois Field adders, a Galois Field multiplier, and multiplexers to interconnect the elements. The REU is then able to perform each of the steps required for Reed-Solomon decoder through reconfiguration for each step using the multiplexers to reconfigure the functions. In this manner, a reconfigurable computational element may be used for each step of the Reed-Solomon decoding process.

Reed-solomon decoder using a configurable arithmetic processor

A SINR estimator receiving a symbol stream has a delay element coupled to the symbol stream to produce a delayed symbol stream, which is also coupled to a conjugator. A first multiplier forms a product from the symbol stream and the output of the conjugator, thereafter summing these values over an interval L and scaling by L to form a correlated power estimate Cn. A second multiplier forms a product from the symbol stream which is multiplied by the conjugate of the input, thereafter summing these values over the preamble interval 2L and scaling by 2L to form a non-correlated power estimate Pn. Cn and Pn are compared to generate an SINR estimate.

Noise estimator for a communications system

A quantizer has a plurality of decision blocks, each coupled from input to output, where each decision blocks output generates a binary value that is an unchanged decision block input if the decision block input is below the threshold input level divided by a power of 2, or the decision block subtracts a threshold divided by the power of 2 and passes this result as the decision block output. The quantizer output is formed from the bits of each comparison from each decision block. The threshold is developed from a channel noise variance which may be multiplied by a scale factor related to coding type and rate. In this manner, a large number of input bits to be quantized may be converted to a smaller number of quantizer output bits, while preserving the dynamic range information required to correctly decode signals passed through a communications channel having multi-path frequency selective fading.

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Notre Dame, IN, United States of America

Sundaram Vanka