Samsung Display Co., Ltd.

Skhynix Inc.

Samsung Displayco., Ltd.

Postech Academy-Industry Foundation

Sun Young Jung

Chung Sock Choi

Sang Hwan Cho

So Young Lee

Cheol Jang

Hyun Ho Kim

Sang Hyun Han

Sun Mi Kang

Gun Hee Kim

Hyun Soo Lee

Jin Wook Yang

Hyun Joon Kim

Jong Lam Lee

Byung Hyun Jeon

Illhwan Lee

Ki Ryong Jeong

A display device includes: a pixel, a scan driver, an emission driver, and a data driver. The pixel includes: a light emitting element; a first transistor; a second transistor connected between a data line and a first node; a third transistor connected between a second node and a third node connected to a gate electrode of the first transistor; a fourth transistor connected between the second node and a third power line; a fifth transistor connected between the first node and a fourth node; a sixth transistor connected between a first power line and the first node and which is turned off in response to a first emission control signal; a storage capacitor connected between the third node and the fourth node; and a first capacitor connected between the first power line and the fourth node.

Pixel and display device including the same

A display device includes a substrate, a first display element which is disposed on the substrate, and a plurality of diffraction patterns which are disposed on a path of light emitted from the first display element and arranged along a direction with a first period. when a width of a cross section of one of the plurality of diffraction patterns is defined as a first length, the first period and the first length satisfy Inequality (1):0.4≤1/1≤1,  (1)

Display device, organic light emitting display device, and head-mounted display device

A display device comprising: a substrate; a plurality of display elements disposed on the substrate; and a diffraction pattern layer disposed on a path of light emitted from the plurality of display elements. The diffraction pattern layer comprises a plurality of diffraction patterns which is disposed with a predetermined pitch, and the plurality of diffraction patterns do not overlap the plurality of display elements; and when a width of a cross section of each of the plurality of diffraction patterns is defined as a length of each diffraction pattern, the predetermined pitch and the length of each diffraction pattern satisfy the following inequation: 0.4&#x2264;d/DP&#x3c;1, where DPdenotes the predetermined pitch, and ddenotes the length of each diffraction pattern.

Display device and head mount display device

A high voltage switch circuit and a semiconductor memory device having the same are provided. The high voltage switch circuit includes a switching circuit for outputting a high voltage by transmitting one of a plurality of pump voltages to an output node; and a discharge circuit connected between the output node and a terminal of an internal power voltage, the discharge circuit discharging the high voltage to a level of the internal power voltage. The discharge circuit includes a triple well transistor.

High voltage switch circuit and semiconductor memory device having the same

A memory device includes an open-for-contact region located between the memory blocks, and a row decoder disposed between global lines to which an operating voltage is supplied and the local lines and configured to transfer the operating voltage to one memory block among the memory blocks in response to a row address, wherein a plurality of contacts are formed in the open-for-contact region and configured to transmit a voltage between the bit lines and a peripheral circuit, wherein a dummy region is included in the row decoder and disposed paced apart from the open-for-contact region in the second direction, and wherein a discharge switch is included in the dummy region and configured to discharge the global lines in response to a discharge signal.

Memory device

A display device, including: a substrate; a first light-emitting element disposed on the substrate; an encapsulation layer disposed on the first light-emitting element; an input sensing layer disposed on the encapsulation layer; and a diffraction pattern layer disposed on the input sensing layer. The diffraction pattern layer may include a plurality of diffraction patterns arranged to have a first period in one direction.

Display device

A display device comprising: a substrate; a plurality of display elements disposed on the substrate; and a diffraction pattern layer disposed on a path of light emitted from the plurality of display elements. The diffraction pattern layer comprises a plurality of diffraction patterns which is disposed with a predetermined pitch, and the plurality of diffraction patterns do not overlap the plurality of display elements; and when a width of a cross section of each of the plurality of diffraction patterns is defined as a length of each diffraction pattern, the predetermined pitch and the length of each diffraction pattern satisfy the following inequation: 0.4&#x2264;d1/DP1&#x3c;1, where DP1 denotes the predetermined pitch, and d1 denotes the length of each diffraction pattern.

A display device includes a substrate, a first display element which is disposed on the substrate, and a plurality of diffraction patterns which are disposed on a path of light emitted from the first display element and arranged along a direction with a first period. when a width of a cross section of one of the plurality of diffraction patterns is defined as a first length, the first period and the first length satisfy Inequality (1):0.4&#x2264;1/1&#x2264;1,&#x2003;&#x2003;(1)

The present disclosure provides a smart window including a first base layer and a second base layer positioned to face each other; a first conductive layer and a second conductive layer respectively positioned at inner surfaces of the first base layer and the second base layer; and an electrolyte layer interposed between the first conductive layer and the second conductive layer, wherein the first conductive layer includes a plurality of first nanostructures, and the second conductive layer includes a plurality of second nanostructures having a different average length from the plurality of first nanostructures.

Growing community of inventors

Suwon-si, South Korea

Sun Young Jung