International Business Machines Corporation

Fudan University

Sun Yang Chen

Wei Zhang

Yang Liu

Pengfei Wang

Yue Xu

Shijin Ding

Lie Zhi Wu

Xingmei Cui

Disclosed is a method and system for clock tree construction across clock domains, an integrated circuit and fabrication method thereof. A method for clock tree construction includes acquiring a netlist describing an integrated circuit (IC), comprising data for describing physical locations and logic connections of clock sinks belonging to multiple clock domains on the pattern of the IC, and constructing the clock tree across clock domains based on the netlist, such that clock cells belonging to different clock domains can share more physical locations. Accordingly, clock trees can be constructed across clock domains to improve IC performance.

Clock tree construction across clock domains

The invention relates to a thin film transistor memory and its fabricating method. This memory using the substrate as the gate electrode from bottom to up includes a charge blocking layer, a charge storage layer, a charge tunneling layer, an active region of the device and source/drain electrodes. The charge blocking layer is the ALD grown AlOfilm. The charge storage layer is the two layer metal nanocrystals which include the first layer metal nanocrystals, the insulating layer and the second layer metal nanocrystals grown by ALD method in sequence from bottom to up. The charge tunneling layer is the symmetrical stack layer which includes the SiO/HfO/SiOor AlO/HfO/AlOfilm grown by ALD method in sequence from bottom to up. The active region of the device is the IGZO film grown by the RF sputtering method, and it is formed by the standard lithography and wet etch method. The TFT memory in this invention has the advantage with large P/E window, good data retention, high P/E speed, stable threshold voltage and simple fabricating process.

Thin film transistor memory and its fabricating method

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Shanghai, China

Sun Yang Chen