Skhynix Inc.

Sun Woong Kim

Eui Cheol Lim

Jung Min Choi

Chang Hyun Kim

Hyung Sik Won

Young Jung Choi

Byung Il Koh

Hyun Chul Kim

Min Ho Ha

An embodiment of the disclosed technology reduces direct data transmission and reception between a plurality of host devices and enables data sharing by a data storage device, through management of allocation information and access mode information of memory regions included in the data storage device used by the plurality of host devices, thereby improving data processing performance by the plurality of host devices and the use efficiency of the data storage device.

Controller, data storage system and computing system

A memory system includes at least one memory device that includes memory areas. The memory system includes a device allocation manager and security erase circuitry. The device allocation manager determines which of the memory areas is allocated or released based on a request input from at least one host. The security erase circuitry stores a security erase task for a first memory area, which is associated with a release determined by the device allocation manager, in an erase job queue, and removes the security erase task from the erase job queue when the first memory area is reallocated to a first host to which the first memory area was allocated before the release.

Apparatus and method for sanitizing a shared memory device or a memory expander

A data processing system includes data processing devices each including a computing memory and configured to perform a task; one or more host devices connected to the data processing devices, and each configured to: select one or more of the data processing devices based on meta information including a size of a memory, and sizes of the computing memories of the respective data processing devices, and request the selected processing devices to perform a first task; a network switch configured to connect the one or more host devices to the data processing devices; and a network manager in the network switch and configured to: collect free memories of the respective data processing devices based on the meta information and the sizes of the computing memories of the respective data processing devices, and control the one or more host devices to use some of the free memories.

Data processing system and operating method thereof

A memory system is disclosed, which relates to technology for implementing data communication between memory devices. The memory system includes a plurality of memory devices and a memory controller. The memory devices allow a data packet composed of data and header information to be directly communicated between the memory devices. The memory controller transmits the data packet to a source memory device from among the plurality of memory devices, and receives the data packet from a last memory device from among the plurality of memory devices. Each of the memory devices hashes the header information such that the data is accessed, using a result of the hash, in address regions located at different positions.

Memory system

A memory system is disclosed, which relates to technology for an accelerator of a high-capacity memory device. The memory system includes a plurality of memories configured to store data therein, and a pooled memory controller (PMC) configured to perform map computation by reading the data stored in the plurality of memories and storing resultant data produced by the map computation in the plurality of memories.

A method for operating a data storage device may include receiving first data; generating first flagged data by adding a first flag to the first data; generating first encoded flagged data by performing an encoding operation on the first flagged data; performing a first write operation for storing the first encoded flagged data in a target position of a phase change memory region; determining whether the first write operation succeeds or falls; generating second flagged data by adding a second flag to second data obtained by inverting the first data, when it is determined that the first write operation fails; generating second encoded flagged data by performing an encoding operation on the second flagged data; and performing a second write operation for storing the second encoded flagged data in the target position.

Growing community of inventors

Hwaseong, South Korea

Sun Woong Kim