Skhynix Inc.

Hynix Semiconductor Inc.

Other

Cj Cheiljedang Corporation

Sun Mi Park

Sang Hyun Oh

Byung Soo Park

Seo Hyun Lee

Sang Bum Lee

Eun Mee Kwon

Sun Young Lee

Hyung Joon Kim

Se Jun Kim

Sang Mok Lee

Nam Kyeong Kim

Yoo Nam Jeon

Nam Kuk Kim

Hyo Jeong Byun

Hyun Koo Nam

Yoon Hee Chung

Sang Wan Jin

Hyung Jun Yang

There are provided a semiconductor device and a manufacturing method of a semiconductor device. The semiconductor device includes: a gate structure including conductive layers and insulating layers, which are alternately stacked; channel structures penetrating the gate structure, the channel structures being arranged in a first direction; and a cutting structure extending in the first direction, the cutting structure consecutively penetrating the channel structures. Each of the channel structures includes a first channel structure and a second channel structure, which are isolated from each other by the cutting structure.

Semiconductor device and manufacturing method of semiconductor device

A semiconductor memory device, and a method of manufacturing the same, includes a lower stack in which a plurality of first interlayer insulating layers and first conductive layers are alternately stacked, a plurality of cell plugs passing through the lower stack in a vertical direction, an upper stack in which a plurality of second interlayer insulating layers and at least one second conductive layer are alternately stacked on the lower stack, a plurality of drain select plugs passing through the upper stack and being in contact with an upper portion of the plurality of cell plugs, and a separation pattern separating adjacent drain select plugs among the plurality of drain select plugs, wherein the separation pattern is in contact with a sidewall of each of the adjacent drain select plugs.

Semiconductor memory device and method of manufacturing the same

The present invention is directed to a method for producing induced electricity which prevents a collision by guiding induced electromagnetic force generated from a power generation coil as electricity is produced in the power generation coil to a predetermined location deviating from the path of power generation magnetic force which proceeds to be interlinked with the power generation coil to thus prevent power generation resistance from occurring and also produces electricity by interlinking the induced electromagnetic force with the power generation coil. The present invention is also directed to a 'method for producing electricity using the induced electromagnetic force of a power generation coil' which uses an energy source for the production of electricity without conversion, so that there are no loss of energy during an energy conversion process and maintenance and management are easy, thereby reducing costs.

Method for producing electricity using inductive electromagnetic force of power generation coil

The present invention relates to an L-lysine-producing microorganism of the genusand a method for producing L-lysine using the same.

sp. microorganisms having l-lysine-producing ability and l-lysine producing method using same

A three dimensional (3-D) non-volatile memory device includes a pipe gate including a first pipe gate, a second pipe gate formed on the first pipe gate, and a first interlayer insulating layer interposed between the first pipe gate and the second pipe gate, word lines alternately stacked with second interlayer insulating layers on the pipe gate, a pipe channel buried within the pipe gate, and memory cell channels coupled to the pipe channel and arranged to pass through the word lines and the second interlayer insulating layers.

3-D non-volatile memory device and method of manufacturing the same

A capacitor of a semiconductor device includes a capacitor structure configured to include electrode layers and dielectric layers alternately stacked, edge regions each stepwise patterned, and a central region disposed between the edge regions, sacrificial layers disposed within the respective electrode layers in the edge regions of the capacitor structure, and support plugs formed in the central region of the capacitor structure and configured to penetrate the electrode layers and the dielectric layers.

Capacitor and register of semiconductor device, memory system including the semiconductor device, and method of manufacturing the semiconductor device

A semiconductor device comprises a transistor comprising a gate, a source, a drain, and a gate insulating layer, and an auxiliary line formed over the drain and electrically insulated from the drain. During a turn-off operation of the transistor, voltage to increase a resistance of the drain is supplied to the auxiliary line.

Semiconductor device

A nonvolatile memory device comprises a semiconductor substrate comprising alternating, parallel active regions and isolation regions; first and second selection lines intersecting the active regions and the isolation regions; first junctions formed in the active regions between the first and second selection lines; spacers formed on sidewalls of the first and second selection lines; second junctions deeper than the first junctions formed in the first junctions, respectively; contact plugs coupled to one side of the respective second junctions; and dummy plugs coupled second sides of the respective second junctions.

Nonvolatile memory device and method of manufacturing the same

A method of manufacturing a flash memory device includes etching an insulating layer provided over a substrate to form a contact hole to define a contact hole exposing a junction region formed on the substrate. The contact hole is filled with a first conductive material, the first conductive material contacting the junction region and extending above an upper surface of the contact hole. The first conductive material is etched to partly fill the contact hole, so that the first conductive material fills a lower portion of the contact hole, wherein an upper portion of the contact hole remains not filled due to the etching of the first conductive material, wherein the etched first conductive material defines a contact plug. A first dielectric layer and a second dielectric layer are formed over the contact plug, thereby filling the upper portion of the contact hole. Part of the first and second dielectric layers is etched to expose the contact plug and the upper portion of the contact hole. A second conductive material is formed on the contact plug and filling the upper portion of the contact hole to form a bit line.

Growing community of inventors

Seoul, South Korea

Sun Mi Park