Samsung Electronics Co., Ltd.

Sun-Joon Kim

Jin-Woo Lee

Du-Heon Song

Hyeoung-Won Seo

Hyuck-Jin Kang

Gwang-Seon Byun

Tai-Heui Cho

Heui-Won Shin

According to embodiments of the invention, a transistor includes a semiconductor substrate having an active region. A channel trench is disposed to cross the active region. A gate insulating layer covers an inner wall of the channel trench. A gate pattern is disposed to fill the channel trench and to extend over a main surface of the semiconductor substrate. Source/drain regions having a first conductivity are disposed in the active region at both sides of the channel trench. A channel impurity region having a second conductivity is disposed beneath one of the source/drain regions to be in contact with at least a sidewall of the channel trench.

Transistor having asymmetric channel region, semiconductor device including the same, and method of fabricating semiconductor device including the same

Integrated circuit devices are provided including an integrated circuit substrate and first through fourth spaced apart lower interconnects on the integrated circuit substrate. The third and fourth spaced apart lower interconnects are parallel to the first and second lower interconnects. A first fuse is provided on the first and second lower interconnects between the first and second lower interconnects and is electrically coupled to the first and second lower interconnects. A second fuse is provided spaced apart from the first fuse and on the third and fourth lower interconnects. The second fuse is between the third and fourth lower interconnects and is electrically coupled to the third and fourth lower interconnects. Related methods of fabricating integrated circuit devices are also provided.

Integrated circuit devices having corrosion resistant fuse regions and methods of fabricating the same

Growing community of inventors

Gyeonggi-do, South Korea

Sun-Joon Kim