University of Michigan

University of Minnesota

Korea Institute of Science and Technology

Sun-Il Chang

Euisik Yoon

Junho Choi

Munsang Kim

Sungchul Kang

Hyung-Kyu Lee

A neural interface for measuring or stimulating brain neural activity, either as a standalone unit or as a part of a larger system of similar neural interfaces. The neural interface includes a bolt-shaped housing having a tool-engaging head and threaded shank with internal circuitry and at least one electrode. In use, the housing is threaded into a cranial bore such that the electrode contacts the outer surface of the meninges. The neural interface circuitry includes an SAR ADC that provides at least rail-to-rail operation to convert received signals from the electrode(s) into digital data that can be modulated and wirelessly transmitted by intra-skin or other suitable communication.

Distributed, minimally-invasive neural interface for wireless epidural recording

A bioamplifier that includes a high pass filter, open-loop amplifier, and low pass filter in an area efficient design that can be used in implantable neural interfaces. The high pass filter can be implemented by using a switch-capacitance resistor coupled with parasitic capacitance of the electrode. The amplifier can be chopper stabilized and can include a high gain, current-ratio first stage followed by one or more dimension-ratio stages. The low pass filter utilizes the output impedance of the open-loop amplifier to form an embedded g-C low pass filter.

Bioamplifier for neural interfaces

An analog to digital converter that comprises a successive approximation register (SAR) having an n bit binary output, a first capacitor array connected to receive some of the bits of the binary output, a second capacitor array connected to receive the remaining bits of the binary output, and a comparator including an output connected to the SAR. The first and second capacitor arrays each have an analog output indicative of the charge stored by capacitors of that array. The comparator includes a pair of inputs, one of which is connected to the analog output of the first capacitor array and the other of which is connected to the analog output of the second capacitor array.

Low-power area-efficient SAR ADC using dual capacitor arrays

A capacitive sensor includes an upper electrode layer having a plurality of electrodes disposed in line with each other, a lower electrode layer having a plurality of electrodes disposed in line with each other, an insulating layer disposed between the upper electrode layer and the lower electrode layer, and a layer of bumps made of insulating material formed above the area where the electrodes of the upper electrode layer and the electrodes of the lower electrode later are crossed. The sensor detects the proximity of approaching objects by the capacitance change between the electrodes disposed in the upper electrode layer, and detects the contact of any objects by the capacitance change between the electrodes of the upper electrode layer and the electrodes of the lower electrode layer.

Growing community of inventors

Ann Arbor, MI, United States of America

Sun-Il Chang