Qualcomm Incorporated

Sujiang Rong

Yiwu Tang

Li Liu

Chiewcharn Narathong

Rajagopalan Rangarajan

Dongmin Park

Jong Min Park

Masoud Moslehi Bajestan

Yunliang Zhu

Mohammad Farazian

An apparatus for radio-frequency (RF) oscillation signal production is disclosed. In example implementations, an apparatus includes an oscillator. The oscillator includes multiple oscillation stages that are coupled together in series into a ring. A respective oscillation stage of the multiple oscillation stages includes a transconductance amplifier and a core oscillator. The transconductance amplifier is coupled to a preceding oscillation stage. The core oscillator is coupled to the transconductance amplifier and to a succeeding oscillation stage, with the core oscillator including at least one output node configured to provide a respective output signal. In some implementations, at least one capacitor is coupled across at least the transconductance amplifier. In some aspects, at least one transistor of the transconductance amplifier is implemented with a silicon-on-insulator metal-oxide-semiconductor (SOI MOS) device that includes at least one back-gate terminal.

Oscillation signal production

A dual-band voltage controlled oscillator (VCO) includes: a first oscillator circuit including a first inductor; a second oscillator circuit including a second inductor; a first mode switch configured to electrically connect or disconnect a first output terminal of the first oscillator circuit and a first output terminal of the second oscillator circuit; a second mode switch configured to electrically connect or disconnect a second output terminal of the first oscillator circuit and a second output terminal of the second oscillator circuit; a third mode switch configured to electrically connect or disconnect a first terminal of the first inductor and a first terminal of the second inductor; and a fourth mode switch configured to electrically connect or disconnect a second terminal of the first inductor and a second terminal of the second inductor.

Low power current re-using transformer-based dual-band voltage controlled oscillator

A method includes generating a first signal based on a difference between a first frequency of a first voltage controlled oscillator (VCO) and a second frequency of a second VCO. The method further includes determining a gain of the first VCO at least partially based on the first signal.

System and method of determining an oscillator gain

A circuit for generating a local oscillator signal includes: at least one divider module configured to receive an input signal and divide a frequency of the input signal by a division ratio; and a load circuit coupled to the at least one divider module, the load circuit configured to provide balanced current pulses that substantially reduce at least a portion of harmonic current ripples in the local oscillator signal.

Local oscillator signal generation circuit with harmonic current rejection

A method, an apparatus, and a computer program product are provided. The apparatus provides a VCO signal. The apparatus is a VCO. The apparatus includes a first transconductance circuit. The apparatus further includes a second transconductance circuit coupled with the first transconductance circuit. The second transconductance circuit has a first configuration/mode (e.g., CMOS configuration/mode) and a second configuration/mode (e.g., NMOS configuration/mode or PMOS configuration/mode). The second transconductance circuit is configured to couple an input of the second transconductance circuit to the first transconductance circuit in the first configuration/mode. The second transconductance circuit is configured to isolate the input of the second transconductance circuit from the first transconductance circuit in the second configuration/mode. The second transconductance circuit may include a first transistor and a second transistor, and the input may be a gate of each of the first transistor and the second transistor.

Hybrid voltage controlled oscillator

A high-speed current-mode clock driver includes feedback circuitry to maintain the voltage swing of a biasing node within a defined range. The current-mode clock driver includes a PMOS and an NMOS transistor receiving an oscillating signal at their gate terminals. The drain terminals of the PMOS and NMOS transistors are respectively coupled to input terminals of first and second variable conductivity circuits whose output terminals are coupled to a common node. A control circuit increases the conductivities of the first and second variable conductivity circuits in response to decreases in voltage swing of the common node, and decreases the conductivities of the first and second variable conductivity circuits in response to increases in voltage swing of the common node. The first and second variable conductivity circuits are optionally PMOS and NMOS transistors respectively.

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San Diego, CA, United States of America

Sujiang Rong