Taiwan Semiconductor Manufacturing Comp. Ltd.

Other

Sui-Ying Hsu

Chia-Ping Lai

Chien-Ying Wu

Chen-Hao Huang

Chien-Chang Lee

Yuehying Lee

Hau-Yan Lu

Yueh-Ying Lee

Chih-Tsung Shih

YingKit Felix Tsui

Wei-Kang Liu

Jing-Hwang Yang

Yueh Ying Lee

An optical integrated circuit (IC) structure includes: a substrate including a fiber slot formed in an upper surface of the substrate and extending from an edge of the substrate, and an undercut formed in the upper surface and extending from the fiber slot; a semiconductor layer disposed on the substrate; a dielectric structure disposed on the semiconductor layer; an interconnect structure disposed in the dielectric structure; a plurality of vents that extend through a coupling region of the dielectric structure and expose the undercut; a fiber cavity that extends through the coupling region of dielectric structure and exposes the fiber slot; and a barrier ring disposed in the dielectric structure, the barrier ring surrounding the interconnect structure and routed around the perimeter of the coupling region.

Optical integrated circuit structure including edge coupling protective features and method of forming same

A method of using a coupling system includes aligning an optical fiber with a cavity in a chip, wherein aligning the optical fiber comprises orienting the fiber within an angle ranging from about 88-degrees to about 92-degrees with respect to a top surface of the chip. The method further includes emitting an optical signal from the optical fiber. The method further includes redirecting the optical signal into a waveguide using a grating positioned on an opposite side of the cavity from the optical fiber.

Method of using fiber to chip coupler and method of making

A method of making a photonic device includes depositing a cladding layer over a silicon layer. The method further includes patterning the cladding layer to expose a first portion of the silicon layer, wherein a second portion of the silicon layer is covered by the patterned cladding layer, and a waveguide portion is in the second portion of the silicon layer. The method further includes depositing a low refractive index layer directly over the patterned cladding layer, wherein a refractive index of the low refractive index layer is less than a refractive index of silicon nitride.

Method of making photonic device

A semiconductor structure includes a substrate, a grating coupler structure over the substrate, a multi-layers film structure over the grating coupler structure. The multi-layers film structure include a first layer including a first refractive index, a second layer over the first layer and including a second refractive index and a third layer over the second layer and including a third refractive index. The second refractive index is greater than the first refractive index and is greater than the third refractive index of the third layer, and a thickness of each layer of the multi-layers film structure is within a range from λ/4 to λ2, λ is a wavelength of light.

Semiconductor structure with multi-layers film

A coupling system includes an optical fiber configured to carry an optical signal. The coupling system further includes a chip in optical communication with the optical fiber. An angle between the optical fiber and a top surface of the chip ranges from about 92-degrees to about 88-degrees. The chip includes a grating configured to receive the optical signal; and a waveguide, wherein the grating is configured to receive the optical signal and redirect the optical signal along the waveguide. ms.

Fiber to chip coupler and method of using

A method of making a chip includes depositing a first polysilicon layer on a top surface and a bottom surface of a substrate. The method further includes patterning the first polysilicon layer to define a recess, wherein the first polysilicon layer is completed removed from the recess. The method further includes implanting dopants into the substrate to define an implant region. The method further includes depositing a contact etch stop layer (CESL) in the recess, wherein the CESL covers the implant region. The method further includes patterning the CESL to define a CESL block. The method further includes forming a waveguide and a grating in the substrate. The method further includes forming an interconnect structure over the waveguide, the grating and the CESL block. The method further includes etching the interconnect structure to define a cavity aligned with the grating.

Fiber to chip coupler and method of making the same

Optical integrated circuit structure including edge coupling protective features and methods of forming same

A coupling system includes an optical fiber configured to carry an optical signal. The coupling system further includes a chip in optical communication with the optical fiber. The chip includes a substrate. The chip further includes a grating on a first side of the substrate, wherein the grating is configured to receive the optical signal. The chip further includes an interconnect structure over the grating on the first side of the substrate, wherein the interconnect structure defines a cavity aligned with the grating. The chip further includes a first polysilicon layer on a second side of the substrate, wherein the second side of the substrate is opposite to the first side of the substrate.

A photonic device includes a silicon layer, wherein the silicon layer extends from a waveguide region of the photonic device to a device region of the photonic device, and the silicon layer includes a waveguide portion in the waveguide region. The photonic device further includes a cladding layer over the waveguide portion, wherein the device region is free of the cladding layer. The photonic device further includes a low refractive index layer in direct contact with the cladding layer, wherein the low refractive index layer comprises silicon oxide, silicon carbide, silicon oxynitride, silicon carbon oxynitride, aluminum oxide or hafnium oxide. The photonic device further includes an interconnect structure over the low refractive index layer.

Photonic device and method of making same

At least one doped silicon region is formed in a silicon layer of a semiconductor substrate, and a silicon oxide layer is formed over the silicon layer. A germanium-containing material portion is formed in the semiconductor substrate to provide a p-n junction or a p-i-n junction including the germanium-containing material portion and one of the at least one doped silicon region. A capping material layer that is free of germanium is formed over the germanium-containing material portion. A first dielectric material layer is formed over the silicon oxide layer and the capping material layer. The first dielectric material layer includes a mesa region that is raised from the germanium-containing material portion by a thickness of the capping material layer. The capping material layer may be a silicon capping layer, or may be subsequently removed to form a cavity. Dark current is reduced for the germanium-containing material portion.

Capping structures for germanium-containing photovoltaic components and methods of forming the same

A photonic device includes an optical coupler, a waveguide structure, a metal-dielectric stack, and a protection layer. The optical coupler is over a semiconductor substrate. The waveguide structure is over the semiconductor substrate and laterally connected to the optical coupler. A top of the waveguide structure is lower than a top of the optical coupler. The metal-dielectric stack is over the optical coupler and the waveguide structure. The metal-dielectric stack has a hole above the optical coupler. The protection layer lines the hole of the metal-dielectric stack.

Photonic device

An optical structure may be provided by forming a silicon grating structure over a dielectric material layer, depositing at least one dielectric material layer over the silicon grating structure, and depositing at least one dielectric etch stop layer over the at least one dielectric material layer. The at least one dielectric etch stop layer includes at least one dielectric material selected from silicon nitride and silicon oxynitride. A passivation dielectric layer may be formed over the at least one dielectric etch stop layer, and a patterned etch mask layer may be formed over the passivation dielectric layer. An opening may be formed through an unmasked portion of the passivation dielectric layer by performing an anisotropic etch process that etches the dielectric material selective to a silicon nitride or silicon oxynitride using the patterned etch mask layer as a masking structure. The at least one etch mask layer minimizes overetching.

Silicon photonics coupling structure using an etch stop layer and methods of forming the same

A method for fabricating a photonic device is provided. The method includes forming an optical coupler and a waveguide structure connected to the optical coupler over a semiconductor substrate; forming a metal-dielectric stack over the optical coupler and the waveguide structure; etching a hole in the metal-dielectric stack and vertically overlapping the optical coupler; and forming a protection layer on a sidewall and a bottom of the hole.

Photonic device and fabrication method thereof

A method for fabricating a photonic device is provided. The method includes patterning a semiconductor layer to form a waveguide structure, a semiconductor structure connected to the waveguide structure, and a dummy semiconductor structure disconnected from the waveguide structure and the semiconductor structure; epitaxially growing an epitaxial semiconductor feature over the semiconductor structure and a dummy epitaxial semiconductor feature over the dummy semiconductor structure; depositing a first capping film over the epitaxial semiconductor feature and the dummy epitaxial semiconductor feature; depositing a second capping film over the first capping film, wherein an oxide concentration of the second capping film is greater than an oxide concentration of the first capping film; and patterning the first and second capping films to form at least a dummy composite capping layer over the dummy epitaxial semiconductor feature.

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Taipei, Taiwan

Sui-Ying Hsu