Maxim Integrated Products, Inc.

Sui Ping Shieh

Charles M Allen

Brett J Fox

Robert Bruce Denmark

Pirooz Parvarandeh

David Bingham

Scott E Jones

Dana William Davis

Suhel Dhanani

Rune Domsten

Anil Telikepalli

A power supply module implemented within a first device and including a voltage regulator and an authentication module. The voltage regulator receives power from a power source and supplies the power to devices within the first device. The power source is separate from the power supply module. The authentication module includes a regulator module and a generation module. The regulator module controls operation of the voltage regulator based on operation in one of multiple operating modes. The generation module: receives an authentication request signal from a host device; in response to the authentication request signal, transmits an authentication response signal to the host device; and receives a notification signal from the host device based on the authentication response signal. The notification signal indicates whether the power supply module is an authorized device. The regulator module is configured to transition between the operating modes based on the notification signal.

System and method for monitoring network devices incorporating authentication capable power supply modules

Methods and apparatus for providing network communications capability to a computer system in accordance with standard communication line protocols are described, including interface circuits which sense various characteristics of the communication lines to control or provide signals to control power to line drivers and/or other substantial power consuming circuitry to conserve power when communication line conditions indicate powering such circuits is not useful. Various embodiments are disclosed.

Communication circuit having network connection detection capability

An interface output stage includes a pull-up circuit and a pull-down circuit connected to a positive power supply signal line having a first voltage, an output signal line having an output voltage and a negative power supply signal line having a second voltage. The pull-up circuit includes a single output transistor and a body snatcher circuit, both interconnected between the positive power supply signal line and the output signal line. The body snatcher circuit ties the bodies of the output transistor and the transistors forming the body snatcher circuit to either the first voltage or the output voltage. The pull-down circuit is designed generally similar to the pull-up circuit to tie bodies of its transistors to either the output voltage or the second voltage.

Single output transistor output stage for interface applications

Method and apparatus for use in a microcontroller based system for detecting an active reset followed by the release of the reset line, and upon the release of the reset line, rapidly driving the reset line of the system to the inactive state to prevent the microcontroller from falsely interpreting the reset line voltage level as being a non-microcontroller initiated reset. The reset line is then released, after a short time delay so as to not interfere with any succeeding reset signal.

Reset methods and apparatus for microcontrollers having bidirectional

Communication interface circuit having network connection detection

An apparatus for disabling a watchdog function of a watchdog circuit when a watchdog input pin of the watchdog circuit fails to receive an externally pulsed signal, which has a first predefined period. The watchdog circuit, while the watchdog function is enabled, generates a watchdog fault condition if the externally pulsed signal is not received at the watchdog input pin by the end of a predefined watchdog timeout period. The apparatus includes a pulse generation circuit for generating a pulsed signal having a second predefined period, the second predefined period being shorter than the watchdog timeout period. Further, the apparatus includes a drive circuit coupled to the pulse generation circuit and the watchdog input pin. The drive circuit provides an internally pulsed signal to the watchdog input pin at a predefined current level, responsive to the pulsed signal from the pulse generation circuit. This predefined current level is sufficient to pull the watchdog input pin to a potential level of the internally pulsed signal when the watchdog input pin does not receive the externally pulsed signal. Moreover, this predefined current level is incapable of pulling the conductor to the potential level of the internally pulsed signal when the watchdog input pin receives the externally pulsed signal.

Methods and apparatus for disabling a watchdog function

A lower power trim circuit in accordance with the present invention includes the series connection of a resistive element, a first transistor, and a second transistor between nodes of a voltage source. The first transistor (which is coupled to the resistive element) is much larger, e.g. twice as large, as the second transistor. When the resistive element is in a low resistance state, the first transistor dominates a node between the first and second transistors due to its large size, thereby causing the node attain a first logical state. When the resistive element is in a high resistance state, the second transistor dominates the node, causing the node to go to a second logical state. The programmable resistive element is preferably selected from a group consisting essentially of silicide resistors, capacitors, and antifuses. The low power trim circuit of the present invention consumes very little power because the gain of the transistor coupled to the resistive element is used to achieve the desired rail-to-rail swing of the output. A low power trim system of the present invention includes one or more of the aforementioned trim circuits and, in addition, a power supply, a bias generator, and a resistive network. A method for trimming a circuit includes measuring at least one resistive parameter of a resistive network in an integrated circuit, comparing the resistive parameter to a desired resistive parameter, determining a trim resistor programming pattern, and programming at least one trim resistor in the integrated circuit in accordance with the trim resistor programming pattern such that flowing a current through a series connection of the trim resistor in an unbalanced transistor pair of the integrated circuit develops a trim signal at a juncture between said unbalanced transistor pair.

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Los Altos, CA, United States of America

Sui Ping Shieh