Seoul National University

Skhynix Inc.

Samsung Electronics Co., Ltd.

International Business Machines Corporation

Lg Electronics Inc.

Snur & Db Foundation

Gwanak Analog Co., Ltd.

Hynix Semiconductor Inc.

Suhwan Kim

Deog-Kyoon Jeong

Joo-Hyung Chae

Stephen Victor Kosonocky

Mino Kim

Hyunjoong Lee

Daniel Ray Knebel

Minsung Kim

Jae-Hoon Kim

Jaehoon Jun

Chang-jun Choi

Junsoo Cho

Dae-Yong Shim

Sangyoon Lee

Sang-Yoon Lee

Young-Lim Park

Seyun Kim

Jaewook Kim

Donghwan Kim

Toshiro Nakanishi

Hyunjun Kim

Jong-Bom Seo

Kyuho Cho

Sunmin Moon

Sangyeol Kang

Taehyun An

Chang-Ho Hyun

Sungkweon Baek

Sungwoo Kim

Gi-Moon Hong

Joohyun Jeon

Jaewan Chang

Gabjin Nam

Jin Soak Kim

Seongyul Park

Yongun Jeong

Cyuyeol Rhee

Minjae Kim

Hankyu Chi

Jaekwang Yun

Yubin Kim

Eunae Chung

Sungphil Choi

Taehoon Kim

Dong Hyun Kim

Ic-Su Oh

Peter Anthony Sandon

Jung Hwan Choi

Dae Han Kwon

Junyoung Park

Azeez Jennudin Bhavnagarwala

Young Sik Kim

Ji Hyo Kang

Thomas Edward Cook

Han Vit Yang

Jae Sung Kim

Jae Wook Kwon

Gi Moon Hong

Min-Chang Kim

Ah-Reum Kim

Kwan-Dong Kim

Jung Hoon Seo

Gun-Ok Jung

Seong Ok Bae

Byoungwoo Choi

Sumin Kim

Cheol-Hong Min

Dong-Hyuk Lim

Han-Gon Ko

Changho Hyun

Rahul Singh

Hyoung-Wook Lee

Ian R Govett

Jae Hyeok Yang

Woo-Yeol Shin

Hyunkyu Park

Hyunjong Kim

Seok-Min Ye

Youngtae Yang

Shin Hyun Jeong

Yungeon Baek

Jong-Kwan Woo

Seong-Jai Min

Sung-Phil Choi

Shin-Hyun Jeong

Hyeongjun Ko

Sungyong Cho

Joohyung Chae

Cyu-Yeol Rhee

An amplifying device includes a main amplifier; a first feedback circuit coupled between an input terminal of the main amplifier and an output terminal of the main amplifier; an input coupling circuit coupled between the input terminal of the main amplifier and a first node; and an amplifying feedback circuit coupled between the output terminal of the main amplifier and the first node, wherein the first feedback circuit and the amplifying feedback circuit are negative feedback circuits.

Amplifying device having high input impedance

A semiconductor device includes a signal conversion circuit configured to convert a sensing current provided from a sensing element into a sensing voltage; an analog-to-digital converter (ADC) configured to convert the sensing voltage to a digital value; and a driving circuit configured to drive a light emitting element, wherein the ADC generates a digital value corresponding to proximity to an object by performing a primary operation comparing a ramp signal varying with time and the sensing voltage while the light emitting element is not driven and a secondary operation comparing the ramp signal and the sensing voltage while the light emitting element is driven.

Semiconductor device performing proximity sensing

A read-out circuit includes an operational amplifier configured to receive input voltage via a positive input terminal; a feedback capacitor connected between an output terminal of the operational amplifier and a negative input terminal of the operational amplifier; a sensor charging/discharging circuit configured to charge or to discharge a sensor capacitor included in a sensor during a first time; and a switching circuit configured to connect the sensor capacitor and the operational amplifier during a second time after the sensor capacitor is charged or discharged.

Read-out circuit for a capacitive sensor

A read-out circuit includes an operational amplifier configured to receive an input voltage through a positive input terminal; a feedback capacitor connected between an output terminal of the operational amplifier and a negative input terminal of the operational amplifier; a sensor charging and discharging circuit configured to charge or discharge a sensor during a first time; a switching circuit connecting the sensor and the operational amplifier during a second time after the sensor is charged or discharged; and a duty control circuit configured to determine a duty ratio of the first time and the second time according to a capacitance of the sensor.

A phase mixing circuit for a multi-phase signal includes a jitter cancellation circuit configured to mix phases of a signal input to a first node and a signal input to a second node to produce signals at a third node and a fourth node; and a delay adjustment circuit configured to adjust delays of the signals output from the third node and the fourth node to produce signals at a fifth node and a sixth node.

Phase mixing circuit and multi-phase clock signal alignment circuit including the same

An amplifier includes an amplification circuit including an input circuit receiving an input signal and configured to output an output signal by amplifying the input signal; and an offset cancelling circuit configured to cancel offset by controlling the input circuit according to activation control signal and offset control signal, wherein the offset cancelling circuit cancels the offset according to the offset control signal after the activation control signal is activated.

Amplifier capable of cancelling offset and sensor capable of cancelling offset component

A capacitor structure may include a lower electrode on a substrate, a dielectric layer on the substrate, and an upper electrode on the dielectric layer. The lower electrode may include a metal nitride having a chemical formula of MN(Mis a first metal, and y is a positive real number). The dielectric layer may include a metal oxide and nitrogen (N), the metal oxide having a chemical formula of MO(Mis a second metal, and x is a positive real number). A maximum value of a detection amount of nitrogen (N) in the dielectric layer may be greater than a maximum value of a detection amount of nitrogen (N) in the lower electrode.

Capacitor structure, method of forming the same, semiconductor device including the capacitor structure and method of manufacturing the same

A capacitive transmitter includes a control circuit configured to generate a data signal by delaying input data and to generate a control signal according to the input data and a delayed signal thereof; a capacitor connected between a first node and a transmission node; a driving circuit configured to receive the data signal and to provide an output signal corresponding to the data signal to the first node; and a bias setting circuit configured to set a transmission voltage at the transmission node according to the control signal.

Capacitive transmitter

A transmitter includes a driving circuitry configured to drive a channel coupled to an output node by controlling an output impedance of a pull-up path, an output impedance of a pull-down path, or both, according to one or more multi-bit data signals, a pull-up control signal, and a pull-down control signal; a driving control circuit configured to generate the pull-up control signal and the pull-down control signal according to one or more calibration signals and the multi-bit data signals or according to the calibration signals and one or more duplicate multi-bit data signals, the duplicate multi-bit data signals duplicating the multi-bit data signals; and a look-up table storing values of the calibration signals.

Transmitter for transmitting multi-bit data

A semiconductor device includes a circuit including an input coupled to a first node; and a first signal control circuit configured to determine a voltage of the first node in a low power mode, wherein the first signal control circuit sets a voltage of the first node to a first value in an n-th occurrence of the low power mode and a second value different from the first value in an m-th occurrence of the low power mode, and wherein n and m are two different natural numbers.

Semiconductor device for controlling voltage at an input node of a circuit during a low power mode

A delta-sigma modulator generates a bit stream signal from an analog signal by operating according to a modulation period including a sampling period and a filtering period and includes a digital-to-analog converter (DAC) configured to generate a charge signal according to one of a first reference voltage and a second reference voltage according to the bit stream signal during the sampling period and to output a signal generated according to the charge signal and the other of the first reference voltage and the second reference voltage; a loop filter configured to charge a sampling signal corresponding to the analog signal during the sampling period and to filter an output from the DAC and a signal generated according to the sampling signal during the filtering period; and a quantizer configured to generate the bit stream signal according to an output from the loop filter in the modulation period.

Delta-sigma modulator and analog-to-digital converter including the same

A calibration circuit includes an oscillator configured to generate an oscillation signal according to a control voltage; a counter configured to generate a count value according to the oscillation signal; and a control circuit configured to control a pull-up driver and a pull-down driver commonly coupled to an output node according to the count value, wherein the control circuit compares a reference count value of the counter by providing a reference voltage as the control voltage for a unit control period with a count value of the counter by providing an output voltage of the output node as the control voltage for a unit control period, and controls a pull-up control signal that adjusts turn-on impedance of the pull-up driver and a pull-down control signal that adjusts turn-on impedance of the pull-down driver.

Calibration circuit and transmitter including the same

A derivative receiver includes a differentiator configured to differentiate an input signal; a comparator configured to produce a comparison signal by comparing a derivative signal produced using an output from the differentiator with a threshold voltage; and a pattern detecting equalizer configured to output a data signal by sampling an equalization signal generated by adjusting a level of the comparison signal. The level of the comparison signal is adjusted according to a past value of the data signal.

Derivative receiver

An analog-to-digital converter (ADC) includes an input circuit configured to receive a first analog signal output from a first sensor or a second analog signal output from a second sensor according to an operation mode and a bit stream; a filter configured to filter an output signal from the input circuit; a quantization circuit configured to generate the bit stream from an output signal of the filter; and a digital circuit configured to generate a first digital signal corresponding to the first analog signal or a second digital signal corresponding to the second analog signal by filtering the bit stream, wherein the operation mode includes a first mode selecting the first sensor and a second mode selecting the second sensor, and wherein the digital circuit refers to the second digital signal generated during the second mode to generate the first digital signal during the first mode.

Analog-to-digital converter for converting analog signals input from a plurality of sensors

Growing community of inventors

Seoul, South Korea

Suhwan Kim