Nortel Networks Corporation

Nokia Corporation

Aruba Networks, Inc.

Csi Zeitnet (a Cabletron Systems Company)

Suhas Anand Shetty

De B Vu

Arthur Lin

Kent Huntley Headrick

Flavio Giovanni Bonomi

Thomas Daly

Shyam Prasad Pillalamarri

Anthony L Alles

David Mullenex

William Stanley Evans

A pipelined out-of-order process and system for handling data packets in a network device. The process and system are scalable to support throughput in excess of 10 Gbps. The system includes a set of processing cores that offload the table look up operations and similar operations from the central processing unit. The central processing unit receives the requisite data needed for performing forwarding, routing, NAT, firewall maintenance and similar operation on data packets from the set of processing cores.

Hardware based parallel processing cores with multiple threads and multiple pipeline stages

A method and a search engine are described. A unique key is received. A hash is searched for a match to the unique key. Concurrently with searching the hash, a cache is searched for the match to the unique key. And information regarding the unique key is obtained.

Near-perfect, fixed-time searching algorithm using hashing, LRU and cam-based caching

An internet service node (ISN) enabling the provision of desired service policies to each subscriber. The ISN may contain multiple processor groups, with each subscriber being assigned to a processor group. The assigned processor group may be configured with the processing rules, which provide the service policies desired, by a subscriber. A port may determine the specific processor group to which received data is to be forwarded. A content addressable memory with masks for individual locations may be implemented to quickly determines the processor group to which received data is to be assigned to. Due to the features of the present invention, an ISN may be able to serve a large number of subscribers efficiently. The ISN may be used at the edge of an access network.

Providing desired service policies to subscribers accessing internet

A content addressable memory (CAM) having a search field, a mask and an output for each CAM location is used to efficiently determine a processor for processing IP packets, with each IP packet being received as a sequence of cells. IP packets may be assigned to a processor (group) based on an examination of the header data, potentially including IP header and other higher layer protocols headers. The search field of a CAM location is pre-stored with header data, and the bit positions to be searched in the location are specified by using a mask. The output of the location identifies the processor group for executing packets with headers matching the search field, with only the bits specified by the mask being compared. When a first cell of an IP packet is received, the header data is provided as an input to the CAM, and the output identifies the processor (group) for executing the IP packet.

Assigning cell data to one of several processors provided in a data switch

A switch guaranteeing a minimum amount of memory space for desired connection while allowing efficient dynamic change of maximum memory space that can be used by a connection. Only an amount of memory space which is required for guaranteeing the minimum amount of memory space is reserved. When the reserved space is decremented due to new cells being received on connections, the maximum memory space reserved for each connection is dynamically increased. For multicast connections, only a single copy of the cell data is stored even though a multicast cell is transmitted on several ports. Multicast cells can also be processed using the same signals used for processing unicast cells.

Efficient method and apparatus for allocating memory space used for buffering cells received on several connections in an asynchronous transfer mode (ATM) switch

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San Jose, CA, United States of America

Suhas Anand Shetty