Adeia Semiconductor Bonding Technologies Inc.

Suhail Jaan Sadiq

Belgacem Haba

Gaius Gillman Fountain, Jr

Laura Wills Mirkarimi

Kyong-Mo Bang

Ron Zhang

Pawel Mrozek

George Carlton Hudson

Embodiments herein provide for fluidic cooling assemblies embedded within a device package and related manufacturing methods. In one embodiment, the integrated cooling assembly includes a semiconductor device and a cold plate attached to the semiconductor device. The cold plate has a perimeter sidewall, a top portion and pairs of opposing cavity sidewalls. The perimeter sidewall extends downwardly from the top portion to a backside of the semiconductor device to define a perimeter of the cold plate. Each pair of opposing cavity sidewalls extends downwardly from the top portion towards the backside of the semiconductor device to define a coolant chamber volume therebetween. A distance between each pair of opposing cavity sidewalls in a direction parallel with the backside of the semiconductor device defines a width of a corresponding coolant chamber volume and a spacing between adjacent coolant chamber volumes, wherein the ratio of width to spacing is about 1:1.

Fluid channel geometry optimizations to improve cooling efficiency

A method of manufacturing a device package. The method comprises patterning a first substrate to form patterned regions comprising a thermal oxide layer. The method further comprises directly bonding the patterned regions of the first substrate to a second substrate to form a bonding interface. The bonded first and second substrates form an integrated cooling assembly comprising a coolant chamber volume. Portions of the first substrate exposed to the coolant chamber volume comprise a native oxide layer.

Integrated cooling assemblies for advanced device packaging and methods of manufacturing the same

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Dublin, CA, United States of America

Suhail Jaan Sadiq