Hitachi, Ltd.

Hitachi Tobu Semiconductor

Suguru Sakaguchi

Ichiro Miyano

Hiroyuki Tanaka

Aizo Kaneda

Koji Serizawa

Kunihiko Nishi

Atsushi Nakamura

Toshio Sugano

Masayuki Watanabe

Kunio Matsumoto

Seiichiro Tsukui

Yoshiaki Wakashima

Michio Tanimoto

Toshiharu Ishida

Michiharu Honda

Takeshi Komaru

Kooji Serizawa

Muneo Oshima

Tohru Yoshida

Tadao Shinoda

Kohji Nagaoka

Kohji Serizawa

Akira Murata

Hiroshi Nakamura

Hiroshi Yamaguchi

Naoya Kanda

Tasao Soga

Ryohei Satoh

Koji Suzuki

Tetsuya Nakatsuka

Munehisa Kishimoto

Hanae Shimokawa

Kazuo Hirota

Yasuo Amano

Takanobu Noro

Toru Yoshida

Isao Ohomori

Masaaki Mutoh

Shingo Yorisaki

A film carrier tape and laminated multi-chip semiconductor device incorporating the same and method thereof wherein a plurality of chip semiconductor devices are laminated onto a substrate. Each chip semiconductor device includes a film carrier tape having leads, a semiconductor chip electrically connected to the leads, a heat sink mounted to a surface of the chip, and a connector for mounting the heat sink, the connector being electrically connected to the leads of the film carrier tape. The film carrier tape includes a carrier member having a metallic layer superposed thereon which is etched so as to form the leads and the heat sink.

Film carrier tape and laminated multi-chip semiconductor device incorporating the same and method thereof

Electronic components are bonded to an electronic circuit board with a lead-free solder. The bonded structure is cooled from a temperature close to the liquids temperature of the solder to a temperature close to the solids temperature of the solder at a first cooling rate of about 10 to 20&deg; C./second, followed by cooling the bonded structure to a temperature lower than the solids temperature of the solder at a second cooling rate of about 0.1 to less than 5&deg; C./second.

Method and apparatus of manufacturing an electronic circuit board

A film carrier tape and laminated multi-chip semiconductor device incorporating the same and method thereof wherein a plurality of chip-semiconductor devices are laminated onto a substrate. Each chip semiconductor device includes a film carrier tape having leads, a semiconductor chip electrically connected to the leads, a heat sink mounted to a surface of the chip, and a connector for mounting the heat sink, the connector being electrically connected to the leads of the film carrier tape. The film carrier tape includes a carrier member having a metallic layer superposed thereon which is etched so as to form the leads and the heat sink.

Film carrier tape and laminated multi-chip semiconductor device

In a tape carrier type semiconductor device with reinforcement wherein tape carrier type semiconductor modules are mounted in holes or depressions enclosed by a frame, and at least one flexible circuit is stacked additionally as required, and the semiconductor modules are electrically connected to electrodes formed on the frame, by mounting chip parts such as capacitors on the frame and/or flexible circuit, the mounting area of the semiconductor device can be reduced and the performance can be hyperfunctioned. By stacking a plurality of such semiconductor devices with reinforcement, much more satisfactory effects can be obtained.

Semiconductor device with reinforcement

A method for producing an electronic part mounting structure in which electronic parts such as IC packages are electrically connected to the surface of a printed circuit board utilizes a low-melting point metal. More particularly, the method provides an electronic part mounting structure capable of sufficiently and assuredly supplying solder to a portion between the terminal of a printed circuit board and the leads of an electric part while maintaining a predetermined thickness required to connect the printed circuit board and the electronic part to each other. By arranging the structure such that a gap, in which a solder layer having a predetermined thickness can be formed between the terminal of the printed circuit board and the lead of the electronic part to be connected to the terminal, is formed, the solder required to solder-connect the two elements can be sufficiently and assuredly supplied to the gap. Therefore, a reliable solder connection can be established.

Method for producing electronic part mounting structure

There is a trend to increase that area of a device requiring a memory of large capacity, which is occupied by a semiconductor memory. This trend obstructs reduction of the size of the device. The present invention contemplates to provide a memory which can have a high integration, a high density and a large capacity while minimizing the mounting area. In order to achieve this memory, the TAB (Tape Automated Bonding) of the prior art is mounted on an electrically conductive connector, and a plurality of structures composed of the TAB and the connector are stacked. Moreover, the connector mounting the TAB thereon is constructed such that the independent terminals of the stacked TABs may not be shorted.

Stacked semiconductor memory device and semiconductor memory module

The present invention provides a method for manufacturing a highly reliable semiconductor device without waste by incorporating predetermined functions into a wafer in a wafer completion process, aging the wafer in a wafer aging process, distinguishing between non-defective and defective chips in a probe inspection process, separating chips in the wafer one by one in a dicing process, sorting out the chips into non-defective and defective chips in a selection process, then analyzing failure information and feeding back the result of the analysis to the wafer completion process in a feedback process, thereby quickly analyzing and repairing a failure process on reliability in the wafer completion process.

Method for manufacturing a semiconductor device including wafer aging,

Semiconductor stacked device

This invention relates to a connecting structure for electrically connecting an electronic part such as an LSI chip to a substrate, its production method and an electronic device using the former. The present invention is particularly useful for connecting electrically a plurality of chips, for which an absorption function of the difference of thermal expansion in a horizontal direction and capability of displacement in a vertical direction are requisite, to a substrate. Moreover, the connecting structure of the present invention can simplify the fabrication process, has high reliability and can be applied to high performance electronic appliances and apparatuses such as electronic computers.

Connecting structure of electronic part and electronic device using the

Semiconductor device and semiconductor module with a plurality of

Disclosed is a connecting structure for electrically connecting an electronic part such as an LSI chip to a substrate and a method of manufacturing the same. The present invention is suitable especially for electrical connection between a plurality of chips and a substrate which is required to have a function of absorbing a difference in thermal expansion in the horizontal direction and to deform in the vertical direction, and characterized in that a conductive flat spring having a height not more than the minimum length in the lateral direction is provided between the electronic part such as a chip and a wires substrate.

Connecting structure for electronic part and method of manufacturing the

In connecting an electronic circuit part such as a semiconductor or other part to a substrate for mounting the part with solder, the solder is composed of a high-melting-point solder portion which is subjected to working such as rolling and heat treatment in order to break the cast structure thereof, and a smaller volume of low-melting-point solder portions. The high-melting-point solder portion is connected to both the electronic circuit substrate and the electronic circuit part through the low-point-melting solder portions. This method enables interconnection between objects to be connected without impairing the high ductility and toughness of the high-melting-point solder which is subjected to working and heat treatment. This soldering method ensures highly reliable manufacture of miniaturized high density circuits, such as LSI.

Electronic circuit device and method of producing the same

Growing community of inventors

Chigasaki, Japan

Suguru Sakaguchi