Sony Semiconductor Solutions Corporation

Sony Corporation

Sony Group Corporation

Suguru Saito

Nobutoshi Fujii

Minoru Ishida

Hiroshi Tazawa

Hiroyasu Matsugai

Hiroyuki Itou

Toshiaki Shiraiwa

Keiji Ohshima

Masanori Iwasaki

Toshihiko Hayashi

Masaki Haneda

Shuzo Sato

Yusuke Moriya

Kenya Nishio

Takeshi Yanagita

Yoshiya Hagimoto

Shunsuke Maruyama

Shuji Manda

Ryosuke Matsumoto

Kaoru Koike

Takashi Oinoue

Toshihiro Kurobe

Tetsuji Yamaguchi

Koichi Takeuchi

Kazunori Nagahata

Shigehiro Ikehara

Hirotaka Yoshioka

Sotetsu Saito

Yuichi Yamamoto

Atsushi Yamamoto

Hideo Shimizu

Yoichi Ootsuka

Tadashi Iijima

Satoru Wakiyama

Naoki Komai

Masaya Nagata

Kaori Takimoto

Masaki Okamoto

Munekatsu Fukuyama

Taizo Takachi

Yoshifumi Zaizen

Kunihiko Hikichi

Koichi Sejima

Takashi Fukatani

Provided is a semiconductor device with a wiring layer including a plurality of wiring lines extending in a first direction; a first insulating film stacked on the wiring layer that has a gap region between the plurality of wiring lines adjacent to each other in a second direction; and a second insulating film between the plurality of wiring lines and the first insulating film. Each wiring line includes a metal film and a barrier metal layer. The metal film includes an electrically conductive material including a first metal. The barrier metal layer partially covers surroundings of the metal film in a cross section orthogonal to the first direction and includes a material including a second metal. The second metal prevents diffusion of the first metal. The second insulating film includes an insulating material and covers a portion of the metal film. The insulating material prevents diffusion of the first metal.

Wiring structure, method of manufacturing the same, and imaging device

The present disclosure relates to a backside illumination type solid-state imaging device, a manufacturing method for a backside illumination type solid-state imaging device, an imaging apparatus, and electronic equipment by which the manufacturing cost can be reduced. A singulated memory circuit and a singulated logic circuit are laid out in a horizontal direction and are embedded by an oxide film and flattened, and then are stacked so as to be contained in a plane direction under a solid-state imaging element. The present disclosure can be applied to an imaging apparatus.

Backside illumination type solid-state imaging device, manufacturing method for backside illumination type solid-state imaging device, imaging apparatus and electronic equipment

A first light receiving element according to an embodiment of the present disclosure includes a plurality of pixels, a photoelectric converter that is provided as a layer common to the plurality of pixels, and contains a compound semiconductor material, and a first electrode layer that is provided between the plurality of pixels on light incident surface side of the photoelectric converter, and has a light-shielding property.

Light receiving element and electronic apparatus

Provided is an imaging unit more efficiently manufacturable with high dimensional precision. The imaging unit includes: a sensor board including an imaging device, in which the imaging device has a plurality of pixels and allows generation of a pixel signal by receiving outside light in each of the plurality of pixels; a bonding layer including an inorganic insulating material; and a circuit board including a circuit chip and an organic insulating layer, in which a circuit chip has a signal processing circuit that performs signal processing for the pixel signal and is bonded to the sensor board through the bonding layer, and the organic insulating layer covers a vicinity of the circuit chip.

Imaging unit, method for manufacturing the same, and electronic apparatus

An imaging device according to an embodiment of the present disclosure includes: a first semiconductor substrate () provided with pixels including a photoelectric conversion element (PD) and floating diffusion (FD) that temporarily holds a charge output from the photoelectric conversion element (PD); and a semiconductor layer (Y) provided on the first semiconductor substrate () via an insulating film (), the semiconductor layer (Y) including a readout circuit unit () that reads out the charge held in the floating diffusion (FD) and outputs a pixel signal, in which the semiconductor layer (Y) is formed of an organic semiconductor material.

Imaging device and electronic device

Provided are a semiconductor device in which an air gap structure can be formed in any desired region regardless of the layout of metallic wiring lines, a method for manufacturing the semiconductor device, and an electronic apparatus. A first wiring layer and a second wiring layer including a metallic film are stacked via a diffusion preventing film that prevents diffusion of the metallic film. The diffusion preventing film is formed by burying a second film in a large number of holes formed in a first film. At least the first wiring layer includes the metallic film, an air gap, and a protective film formed with the second film on the inner peripheral surface of the air gap, and the opening width of the air gap is equal to the opening width of the holes formed in the first film or is greater than the opening width of the holes.

Semiconductor device and method for manufacturing the same, and electronic apparatus

Provided is an imaging device () including: an imaging element (); and a semiconductor element () provided to be opposed to the imaging element and electrically coupled to the imaging element. The semiconductor element includes: a wiring region (A,A) provided in a middle portion and a peripheral region (B,B) outside the wiring region; a wiring layer () having a wiring line in the wiring region; a semiconductor substrate () opposed to the imaging element with the wiring layer interposed therebetween and having a first surface (Sa, Sc) and a second surface (Sb, Sd) in order from a side of the wiring layer; and a polishing adjustment section () including a material that is lower in polishing rate than a constituent material of the semiconductor substrate, the polishing adjustment section being disposed in at least a portion of the peripheral region and provided in a thickness direction of the semiconductor substrate from the second surface.

Image device

The present technology relates to an imaging device, an electronic apparatus, and a method of manufacturing an imaging device capable of thinning a semiconductor on a terminal extraction surface while maintaining a strength of a semiconductor chip. There is provided an imaging device including: a first substrate having a pixel region in which pixels are two-dimensionally arranged, the pixels performing photoelectric conversion of light; and a second substrate in which a through silicon via is formed, in which a dug portion is formed in a back surface of the second substrate opposite to an incident side of light of the second substrate, and a redistribution layer (RDL) connected to a back surface of the first substrate is formed in the dug portion. The present technology can be applied to, for example, a semiconductor package including a semiconductor chip.

Imaging device, electronic apparatus, and method of manufacturing imaging device

There is provided a camera module including a stacked lens structure including a plurality of lens substrates. The plurality of lens substrates includes a first lens substrate including a first lens that is disposed at an inner side of a through-hole formed in the first lens substrate, and a second lens substrate including a second lens that is disposed at an inner side of a through-hole formed in the second lens substrate, wherein the first lens substrate is directly bonded to the second lens substrate. The camera module further includes an electromagnetic drive unit configured to adjust a distance between the stacked lens structure and a light-receiving element.

AF module, camera module, and electronic apparatus

The present technology relates to, for example, a lens attached substrate including a substrate which has a through-hole formed therein and a light shielding film formed on a side wall of the through-hole and a lens resin portion which is formed inside the through-hole of the substrate. The present technology can be applied to, for example, a lens attached substrate, a layered lens structure, a camera module, a manufacturing apparatus, a manufacturing method, an electronic device, a computer, a program, a storage medium, a system, and the like.

Lens attached substrate, layered lens structure, camera module, manufacturing apparatus, and manufacturing method

A deformation of a stacked lens is suppressed. A stacked lens structure has a configuration in which substrates with lenses having a lens disposed on an inner side of a through-hole formed in the substrate are bonded and stacked by direct bonding. The present technique can be applied to a camera module or the like in which a stacked lens structure in which at least three substrates with lenses including first to third substrates with lenses which are substrates with lenses in which a through-hole is formed in the substrate and a lens is formed on an inner side of the through-hole is integrated with a light receiving element, for example.

Stacked lens structure, method of manufacturing the same, and electronic apparatus

The present technology relates to Provided are a semiconductor device in which an air gap structure can be formed in any desired region regardless of the layout of metallic wiring lines, a method for manufacturing the semiconductor device, and an electronic apparatus. A first wiring layer and a second wiring layer including a metallic film are stacked via a diffusion preventing film that prevents diffusion of the metallic film. The diffusion preventing film is formed by burying a second film in a large number of holes formed in a first film. At least the first wiring layer includes the metallic film, an air gap, and a protective film formed with the second film on the inner peripheral surface of the air gap, and the opening width of the air gap is equal to the opening width of the holes formed in the first film or is greater than the opening width of the holes.

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Kanagawa, Japan

Suguru Saito